ProASIC3E Flash Family FPGAs
Revision 13
2-33
Timing Characteristics
Table 2-39 1.8 V LVCMOS High Slew
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.7 V
Drive
Strength
Speed
Grade tDOUT
tDP
tDIN
tPY tPYS tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
2 mA
Std.
0.66
12.10 0.04 1.45 1.91
0.43
9.59
12.10 2.78 1.64 11.83 14.34
ns
–1
0.56
10.30 0.04 1.23 1.62
0.36
8.16
10.30 2.37 1.39 10.06 12.20
ns
–2
0.49
9.04
0.03 1.08 1.42
0.32
7.16
9.04
2.08 1.22
8.83
10.71
ns
4 mA
Std.
0.66
7.05
0.04 1.45 1.91
0.43
6.20
7.05
3.25 2.86
8.44
9.29
ns
–1
0.56
6.00
0.04 1.23 1.62
0.36
5.28
6.00
2.76 2.44
7.18
7.90
ns
–2
0.49
5.27
0.03 1.08 1.42
0.32
4.63
5.27
2.43 2.14
6.30
6.94
ns
6 mA
Std.
0.66
4.52
0.04 1.45 1.91
0.43
4.47
4.52
3.57 3.47
6.70
6.76
ns
–1
0.56
3.85
0.04 1.23 1.62
0.36
3.80
3.85
3.04 2.95
5.70
5.75
ns
–2
0.49
3.38
0.03 1.08 1.42
0.32
3.33
3.38
2.66 2.59
5.00
5.05
ns
8 mA
Std.
0.66
4.12
0.04 1.45 1.91
0.43
4.20
3.99
3.63 3.62
6.43
6.23
ns
–1
0.56
3.51
0.04 1.23 1.62
0.36
3.57
3.40
3.09 3.08
5.47
5.30
ns
–2
0.49
3.08
0.03 1.08 1.42
0.32
3.14
2.98
2.71 2.71
4.81
4.65
ns
12 mA
Std.
0.66
3.80
0.04 1.45 1.91
0.43
3.87
3.09
3.73 4.24
6.10
5.32
ns
–1
0.56
3.23
0.04 1.23 1.62
0.36
3.29
2.63
3.18 3.60
5.19
4.53
ns
–2
0.49
2.83
0.03 1.08 1.42
0.32
2.89
2.31
2.79 3.16
4.56
3.98
ns
16 mA
Std.
0.66
3.80
0.04 1.45 1.91
0.43
3.87
3.09
3.73 4.24
6.10
5.32
ns
–1
0.56
3.23
0.04 1.23 1.62
0.36
3.29
2.63
3.18 3.60
5.19
4.53
ns
–2
0.49
2.83
0.03 1.08 1.42
0.32
2.89
2.31
2.79 3.16
4.56
3.98
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.