REVISION HISTORY
M16C/62P GROUP DATA SHEET
Rev.
Date
Description
Page
1
2
5
5
11
20
21
22
24
25
26
27
30
31
39
41
43
44
53
54
55
57
60
61
62
63
63
64
64
65
68
69
70
71
77
78
88
96
99
100
103
104
105
109
115
117
Summary
298
1.0
Jan/31/Y03
(Continued)
Applications are partly revised.
Table 1.1.1 is partly revised.
Table 1.1.3 is partly revised.
Figure 1.1.2 is partly revised.
Explanation of “Memory” is partly revised.
Explanation of “Hardware Reset 1” is partly revised.
Figure 1.5.1 is partly revised.
Figure 1.5.2 is partly revised.
Figure 1.5.4 is partly revised.
VCR2 Register in Figure 1.5.6 is partly revised.
Figure 1.5.6 is partly revised.
Explanation of “Power Supply Down Detection Interrupt” is partly revised.
Figure 1.6.1 is partly revised.
Figure 1.6.2 is partly revised.
Table 1.7.5 is partly revised.
Table 1.7.7 is partly revised.
Figure 1.7.8 is partly revised.
Explanation of “4 Mbyte Mode” is partly revised.
Notes 12 and 13 in Figure 1.9.2 is partly revised.
Notes 2 and 5 in Figure 1.9.3 is partly revised.
Figure 1.9.4 is partly revised.
Note 4 in Figure 1.9.6 is partly revised.
Explanation of “PLL Clock” is partly revised.
Figure 1.9.9 is partly revised.
Explanation of “CPU Clock and BCLK” is partly revised.
Explanation of “Low-speed Mode” is partly revised.
Explanation of “Low Power Dissipation Mode” is partly revised.
Explanation of “Ring Oscillator Low Power Dissipation Mode” is partly revised.
Table 1.9.3 is partly revised.
Table 1.9.5 is partly revised.
Figure 1.9.10 is partly revised.
Figure 1.9.11 is partly revised.
Table 1.9.7 is added.
Explanation of “System Clock Protective Function” is partly revised.
Explanation of “Power Supply Down Detection Interrupt” is partly revised.
Table 1.11.1 is partly revised.
Figure 1.11.9 is partly revised.
WDTS Register in Figure 1.12.2 is partly revised.
Figure 1.13.2 is partly revised.
Figure 1.13.3 is partly revised.
Figure 1.13.5 is partly revised.
Table 1.13.3 is partly revised.
Explanation of “DMA Enable” is partly revised.
Figure 1.14.3 is partly revised.
Table 1.14.3 is partly revised.
Explanation of “Counter Initialization by Two-Phase Pulse Signal Processing” is
partly revised.
Figure 1.14.10 is partly revised.
Figure 1.14.14 is partly revised.
Figure 1.14.15 is partly revised.
117
122
122