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參數(shù)資料
| 型號(hào)： | LZ2323H5 |
| 廠商： | Sharp Corporation |
| 英文描述： | PLUG, D, FILTERED, 330PF, 62WAY; Connector type:D Sub, High-Density; Gender:Plug; Ways, No. of:62; Termination method:Solder; Material, contact:Copper Alloy; Plating, contact:Bright Tin; Series:FHTB; Material:Steel; Current RoHS Compliant: Yes |
| 中文描述： | 1/3-type傳感器與防治荒漠化面積320萬像素 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 95K |
| 代理商： | LZ2323H5 |
LZ2323H5/LZ2324HJ
3
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Ambient operating temperature
Output transistor drain voltage
Reset transistor drain voltage
Overflow drain
voltage
When pulse is applied p-p level
Ground
P-well voltage
Test pin, T
1
SYMBOL
T
OPR
V
OD
V
RD
V
OFD
V
OFD
GND
V
PW
V
T1
V
V1L
, V
V2L
V
V3L
, V
V4L
V
V1I
, V
V2I
V
V3I
, V
V4I
V
V1H
, V
V3H
V
H1L
, V
H2L
MIN.
TYP.
25.0
15.0
V
OD
MAX.
UNIT
C
V
V
V
V
V
V
V
NOTE
14.5
16.0
When DC is applied
5.0
21.5
19.0
1
2
0.0
–9.0
V
VL
V
OD
Vertical shift
register clock
LOW level
–8.5
–8.0
–7.5
V
INTERMEDIATE level
0.0
V
HIGH level
LOW level
14.5
–0.05
4.7
4.5
15.0
0.0
17.0
0.05
V
V
Horizontal shift
register clock
HIGH level
V
H1H
, V
H2H
5.0
6.0
V
Reset gate clock
LOW level
HIGH level
V
RSL
V
RSH
f
V1
, f
V2
f
V3
, f
V4
f
H1
, f
H2
f
RS
0.0
V
RD
– 13.0
9.5
V
V
V
RD
– 8.5
Vertical shift register clock frequency
15.63
kHz
Horizontal shift register clock frequency
Reset gate clock frequency
NOTES :
Connect NC
1
and NC
2
to GND directly or through a capacitor larger than 0.047 μF.
1. When DC voltage is applied, shutter speed is 1/50-second.
2. When pulse is applied, shutter speed is less than 1/50-second.
9.66
9.66
MHz
MHz
LZ2323H5
LZ2324HJ
* To apply power, first connect GND and then turn on V
OFD
. After turning on V
OFD
, turn on PW first and then turn on other
powers and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied.
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