參數(shù)資料
型號(hào)： LZ21N3
廠商： Sharp Corporation
英文描述： 1/2-type Interline Color CCD Area Sensor with 2 140 k Pixels
中文描述： 1/2-type隔行彩色CCD傳感器的面積2 140萬(wàn)像素
文件頁(yè)數(shù)： 3/19頁(yè)
文件大?。?/td> 153K
代理商： LZ21N3
3
LZ21N3
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Ambient operating temperature
Output transistor drain voltage
Overflow drain clock
Ground
SYMBOL
T
OPR
V
OD
V
OFD
GND
MIN.
TYP.
25.0
13.0
19.5
0.0
MAX.
UNIT
C
V
V
V
NOTE
12.5
18.6
13.5
20.9
NOTES :
1. Use the circuit parameter indicated in
"SYSTEM CONFIGURATION EXAMPLE"
, and do not connect to DC voltage directly.
2. V
PW
is set below V
VL
that is low level of vertical shift register clock, or is used with the same power supply that is connected
to V
L
of V driver IC.
* To apply power, first connect GND and then turn on V
OD
. After turning on V
OD
, turn on PW first and then turn on other powers
and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied.
1
P-well voltage
V
PW
–8.0
V
VL
V
2
V
–6.65
–7.0
–7.35
V
V1AL
, V
V1BL
, V
V2L
V
V3AL
, V
V3BL
, V
V4L
V
V1AI
, V
V1BI
, V
V2I
V
V3AI
, V
V3BI
, V
V4I
V
V1AH
, V
V1BH
V
V3AH
, V
V3BH
V
H1L
, V
H2L
V
H1H
, V
H2H
V
RS
f
V1A
, f
V1B
, f
V2
f
V3A
, f
V3B
, f
V4
Vertical shift
register clock
LOW level
INTERMEDIATE level
HIGH level
12.5
0.0
13.0
13.5
V
V
LOW level
HIGH level
p-p level
Horizontal shift
register clock
Reset gate clock
–0.05
4.5
4.5
0.0
4.8
4.8
0.05
5.5
5.5
V
V
V
1
Reset gate clock frequency
f
RS
17.94
MHz
Horizontal shift register clock frequency
f
H1
, f
H2
17.94
MHz
Vertical shift register clock frequency
7.87
kHz
p-p level
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參數(shù)描述
LZ21N3V 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:1/2-type Interline Color CCD Area Sensors with 2 140 k Pixels
LZ21N3VS 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:1/2-type Interline Color CCD Area Sensors with 2 140 k Pixels
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