參數(shù)資料
型號(hào)： LXT9880HC
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù)： 85/96頁(yè)
文件大?。?/td> 1309K
代理商： LXT9880HC
LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater
Datasheet
85
5.3.3
Port Learn and Speed Control Registers
The port learn and speed control register set is described in
Table 61 on page 85
. Refer to
Table 60
for the bit assignments of these registers.
5.3.4
Port Status Registers
The port status register set is described in
Table 63
. Bit assignments are shown in
Table 62
.
Table 60. Port Learn and Speed Control Registers
31:10
9
8
7
6
5
4
3
2
1
0
Rsvd
Port 5 (MII)
Port 4
Port 3
Port 2
Port 1
Table 61. Port Learn and Speed Control Registers
Name
Type
Addr
Description
Port Authorized Learn Enable
Control
R/W
096
This register sets the level of learning each port uses. The Learn
Settings are as follows:
Bit 1
Bit 0
Function
0
0
Learn new source addresses.
0
1
Next Lock. Learn only the first source address
encountered. After a port learns its first address,
it changes the Authorized Learn bits (for that
port) to a
“
10
”
to lock down the address.
1
0
Lock. Hardware locked-down the address. Only
software can write to this address.
1
1
Reserved.
Port Speed Control
R/W
097
This register overrides the hardware settings.
Enabling auto-negotiation via software requires writing to both the Port
Speed Control Register and the Auto-Negotiate Configuration Register
(see
Table 82 on page 94
).
Forcing a port
’
s speed overrides and disables auto-negotiation.
The MII (expansion) port is not software-configurable.
Default is set by pins SPD0 and SPD1. Settings are as follows:
SPD1
SPD0
Function
0
0
If auto-negotiate is enabled, advertise all
abilities. Otherwise port is disabled.
0
1
Force 10 Mbps TP
1
0
Force 100 Mbps Fiber (Does not apply to MII)
1
1
Force 100 Mbps TP
Table 62. Port Status Register Bit Assignments
31:4
4
1
3
2
1
0
Rsvd
Port 5 (MII)
Port 4
Port 3
Port 2
Port 1
1. Bit 4 used only in the port partition and port speed status registers.
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