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參數(shù)資料
| 型號： | LXT972A |
| 廠商： | Intel Corp. |
| 英文描述： | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| 中文描述： | 3.3雙速快速以太網(wǎng)收發(fā)器數(shù)據(jù)表 |
| 文件頁數(shù)： | 3/70頁 |
| 文件大?。?/td> | 833K |
| 代理商： | LXT972A |
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Datasheet
3
3.3V Dual-Speed Fast Ethernet Transceiver Datasheet — LXT972A
Contents
1.0
Pin Assignments
............................................................................................................10
2.0
Signal Descriptions
........................................................................................................13
3.0
Functional Description
..................................................................................................16
3.1
Introduction..........................................................................................................16
3.1.1
Comprehensive Functionality.................................................................16
3.1.2
OSP
Architecture................................................................................16
3.2
Network Media / Protocol Support.......................................................................17
3.2.1
10/100 Network Interface .......................................................................17
3.2.1.1 Twisted-Pair Interface ...............................................................17
3.2.1.2 Fault Detection and Reporting...................................................17
3.2.2
MII Data Interface...................................................................................18
3.2.3
Configuration Management Interface.....................................................18
3.2.3.1 MDIO Management Interface....................................................18
3.2.3.2 MII Interrupts .............................................................................19
3.2.3.3 Hardware Control Interface .......................................................19
3.3
Operating Requirements.....................................................................................20
3.3.1
Power Requirements..............................................................................20
3.3.2
Clock Requirements...............................................................................20
3.3.2.1 External Crystal/Oscillator.........................................................20
3.3.2.2 MDIO Clock...............................................................................20
3.4
Initialization..........................................................................................................21
3.4.1
MDIO Control Mode ...............................................................................21
3.4.2
Hardware Control Mode .........................................................................21
3.4.3
Reduced Power Modes..........................................................................22
3.4.3.1 Hardware Power Down .............................................................22
3.4.3.2 Software Power Down...............................................................22
3.4.4
Reset......................................................................................................23
3.4.5
Hardware Configuration Settings ...........................................................23
3.5
Establishing Link .................................................................................................24
3.5.1
Auto-Negotiation.....................................................................................24
3.5.1.1 Base Page Exchange................................................................24
3.5.1.2 Next Page Exchange.................................................................24
3.5.1.3 Controlling Auto-Negotiation .....................................................25
3.5.2
Parallel Detection...................................................................................25
3.6
MII Operation.......................................................................................................25
3.6.1
MII Clocks...............................................................................................26
3.6.2
Transmit Enable .....................................................................................26
3.6.3
Receive Data Valid.................................................................................26
3.6.4
Carrier Sense .........................................................................................26
3.6.5
Error Signals...........................................................................................26
3.6.6
Collision..................................................................................................26
3.6.7
Loopback................................................................................................28
3.6.7.1 Operational Loopback ...............................................................28
3.6.7.2 Test Loopback...........................................................................28
3.7
100Mbps Operation.............................................................................................29
相關PDF資料 |
PDF描述 |
|---|---|
| LXT972ALC | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| LXT972M | Single-Port 10/100 Mbps PHY Transceiver |
| LXT9763 | Fast Ethernet 10/100 Hex Transceiver with Full MII |
| LXT9763HC | LAN TRANSCEIVER|HEX|QFP|208PIN|PLASTIC |
| LXT9784 | Transceiver Hardware Integrity Function Overview |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LXT972ALC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| LXT972LCHFB8 | 制造商:LEVEL_ONE 功能描述: |
| LXT972M | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| LXT973QC | 制造商:Intel 功能描述:LAN Transceiver, Dual, 100 Pin, Plastic, QFP |
| LXT974 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Fast Ethernet 10/100 Quad Transceivers |
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