- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377798 > LXP730 (Intel Corp.) Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 PDF資料下載
參數(shù)資料
| 型號(hào)： | LXP730 |
| 廠商： | Intel Corp. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁(yè)數(shù)： | 1/70頁(yè) |
| 文件大?。?/td> | 531K |
| 代理商： | LXP730 |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)
LXP730
Multi-Rate DSL Framer
Datasheet
The LXP730 is a multi-purpose Digital Subscriber Line (DSL) framer which complements the
Level One SK70725/21 Enhanced MDSL Data Pump (EMDP) to provide seamless transport of
data and voice signals over one or more DSL datapaths.
Applications
Product Features
The LXP730 in combination with the EMDP
chipset is optimized for use as a framer or I/O
interface device for the following applications:
I
Digital Pair Gain Systems
I
Ethernet Modems
I
T1/E1 Fractional Transport Systems
I
Videoconferencing Systems
I
Simultaneous Data - Voice Transport
Systems
I
Wireless Base Station Access Systems
The LXP730 provides the basic functions
required of a DSL framer:
I
Synchronization of external data streams to
the DSL line
I
Multiplexing and demultiplexing of
independent data streams for voice and data
I
Loopback of payload data at the DSL
interface
I
Creation, insertion, and recovery of the
MDSL Overhead (MOH) structure,
performance monitoring, and message
transport required in a DSL system with a
capacity of up to 32 kbps
I
Supports two input/output data streams
simultaneously
—Slave mode: external clock determines
the rate at which data will be transferred
to and from the framer
—Master mode: clock derived from
received DSL clock or external
oscillator
I
Single part architecture allows one chip to
be used economically in both central and
remote locations
I
Supports systems with point-to-point
architectures
I
Alternate Hardware Control mode (HWC)
for operation without an external
microprocessor
As of January 15, 2001, this document replaces the Level One document
LXP730 Multi-Rate DSL Framer Datasheet
.
Order Number: 249266-001
January 2001
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LXT300Z | ADVANCED T1/E1 SHORT-HAUL TRANSCEIVERS |
| LXT301Z | ADVANCED T1/E1 SHORT-HAUL TRANSCEIVERS |
| LXT304A | Low-Power T1/E1 Short-Haul Transceiver with Receive JA |
| LXT305A | Integrated T1/E1 Short-Haul Transceiver wtih Transmit JA |
| LXC6176 | 39513254 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXP730LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FRAMER/FORMATTER|CMOS|QFP|64PIN|PLASTIC |
| LXP80 | 制造商:Johnson Components 功能描述: |
| LXPB2SA-50SB-Q | 制造商:SMC Corporation of America 功能描述:Actuator, electric, ball bushing |
| LXPH0000 | 制造商:Red Lion Controls 功能描述:ANNUNCIATOR LABELS, 1 LPAX LABEL: PH 制造商:Red Lion Controls 功能描述:1 LPAX LABEL PH |
| LXPHA000 | 制造商:Red Lion Controls 功能描述:ANNUN LABELS, 1 LPAX LABEL: PHASE A 制造商:Red Lion Controls 功能描述:1 LPAX LABEL PHASE A |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。