參數(shù)資料
型號: LXP604
廠商: Digital Data Communications GmbH
英文描述: Low-Jitter Clock Adapters(CLADs)
中文描述: 低抖動時鐘適配器(CLADs)
文件頁數(shù): 2/10頁
文件大?。?/td> 680K
代理商: LXP604
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Frame Sync Output.
Frame synchronization output at 8 kHz. FSO is synced to CLKO
and to FSI (if FSI is provided).
High Frequency Output
HFO is used to derive CLKO. HFO can also clock external
devices. HFO is always a multiple of CLKO (CLKO x2, x3, or x4).
Actual frequencies are determined by device, CLKI and CLKO frequencies and Mode
Select (SEL) input, as listed in Table 2.
Clock Input
Input clock (1.544, 2.048 or 4.096 MHz) to be converted.
Clock Output
Output clock (1.544, 2.048 or 4.096 MHz) derived from CLKI.
Ground
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Mode Select.
controls frequency conversion as listed in Table 2.
When SEL = High, higher frequency CLKI (2.048 for LXP600A and LXP602, or 4.096
MHz for LXP604) is converted to 1.544 MHz CLKO.
When SEL = Low, 1.544 MHz CLKI is converted to higher frequency CLKO (2.048 for
LXP600A and LXP602, or 4.096 MHz for LXP604).
Frame Sync Input
8 kHz frame synchronization pulse. Tie High or Low if not used.
Power Supply
+5 V power supply input.
FSI
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