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參數(shù)資料
| 型號： | LX5261 |
| 廠商： | Microsemi Corporation |
| 英文描述： | 27-Line LVD SCSI Source/Sink Regulator |
| 中文描述： | 27日線支持LVD SCSI源/匯調(diào)節(jié) |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 157K |
| 代理商： | LX5261 |
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
Copyright
2000
Rev. 1.0c, 2005-02-08
W
M
.
C
LX5261
27-Line LVD SCSI Source/Sink Regulator
P
RODUCTION
D
ATA
S
HEET
TM
A B S O L U T E M A X I M U M R A T I N G S
Term Power (VTERM).........................................................................................................6V
Operating Junction Temperature..................................................................................... 150
°
C
Storage Temperature Range..............................................................................-65
°
C to 150
°
C
RoHS / Pb-freePeak Package Solder Reflow Temperature
(40 second maximum exposure) ........................................................................260°C (+0, -5)
Note:
Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground.
Currents are positive into, negative out of specified terminal.
T H E R M A L D A T A
DP
16-Pin SOIC
T
HERMAL
R
ESISTANCE
-J
UNCTION TO
A
MBIENT
,
θ
JA
111.8 °C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
θ
JA
can vary significantly
depending on mounting technique. (See Application Notes Section: Thermal
considerations)
P A C K A G E P IN O U T
2
3
5
4
15
14
11
12
6
7
10
8
N/C
9
1
16
N/C
N/C
N/C
N/C
N/C
N/C
N/C
VOUT1
VOUT2
VTERM
HSGND
HSGND
HSGND
GND
DIFSENS
13
DP
P
ACKAGE
(Top View)
NC – No Internal Connection
RoHS / Pb-free 100% Matte Tin Lead
Finish
F U N C T I O N A L P I N D E S C R I P T I O N
P
IN
N
AME
D
ES CRIPT ION
VOUT1
1.75V Regulated Output. Capable of sourcing/sinking 200mA.
VOUT2
0.75V Regulated Output. Capable of sourcing/sinking 200mA.
VTERM
Power supply pin for terminator. Connect to SCSI bus VTERM. Usually decoupled
by one 4.7
μ
F low-ESR capacitor. It is absolutely necessary to connect this pin to the
decoupling capacitor through a very low impedance (big traces to PCB). Keeping distances
very short from the decoupling capacitors is somewhat layout dependent and some
applications may benefit from high frequency decoupling with 0.1
μ
F capacitors at VTERM
pin.
DIFSENS
1.3V buffered output for DIFSENS signaling.
GND
Regulator ground pin. Connect to ground.
HSGND
Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a
heat sink only, and not a true ground connection. It is recommended that these pins be
connected to ground, but can be left floating.
P
A
C
K
A
G
E
D
A
T
A
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