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參數(shù)資料
| 型號： | LX1992 |
| 廠商： | Microsemi Corporation |
| 英文描述： | High Efficiency LED Driver |
| 中文描述： | 高效率LED驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 335K |
| 代理商： | LX1992 |
Microsemi
Linfinity Microelectronics Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 5
Copyright
2000
Rev. 1.1b, 2005-03-03
W
M
.
C
LX1992
High Efficiency LED Driver
P
RODUCTION
D
ATA
S
HEET
TM
A P P L I C A T I O N I N F O R M A T I O N
O
PERATING
T
HEORY
The LX1992 is a PFM boost converter that is
optimized for driving a string of series connected LEDs. It
operates in a pseudo-hysteretic mode with a fixed switch
“off time” of 300ns. Converter switching is enabled as
LED current decreases causing the voltage across R
SET
to
decrease to a value less than the voltage at the VADJ pin.
When the voltage across R
SET
(i.e., V
FB
) is less than VADJ,
comparator A activates the control logic. The control logic
activates the DRV output circuit that connects to the gate
of the external FET. The DRV output is switched “on”
(and remains “on”) until the inductor current ramps up to
the peak current level. This current level is set via the
external R
CS
resistor and monitored through the CS and
SRC inputs by comparator B.
The LED load is powered from energy stored in the
output capacitor during the inductor charging cycle. Once
the peak inductor current value is achieved, the NDRV
output is turned off (off-time is typically 300ns) allowing a
portion of the energy stored in the inductor to be delivered
to the load (e.g., see Figure 5, channel 2). This causes the
output voltage to continue to rise across R
SET
at the input to
the feedback circuit. The LX1992 continues to switch until
the voltage at the FB pin exceeds the control voltage at the
ADJ pin.
The value of R
SET
is established by dividing the
maximum adjust voltage by the maximum series LED
current. A minimum value of 15
is recommended for
R
SET
. The voltage at the FB pin is the product of I
OUT
(i.e.,
the current through the LED chain) and R
SET
.
=
SET
LEDmax
ADJmax
V
I
R
The application of an external voltage source at the
ADJ pin provides for output current adjustment over the
entire dimming range and the designer can select one of
two possible methods. The first option is to connect a
PWM logic signal to the ADJ pin (e.g., see Figure 1). The
LX1992 includes an internal 50pF capacitor to ground that
works with an external resistor to create a low-pass filter
(i.e., filter out the AC component of a pulse width
modulated input of f
PWM
≥
100KHz). The second option is
to adjust the reference voltage directly at the ADJ pin by
applying a DC voltage from 0.0 to 0.3V (e.g., see Figure
2). The adjustment voltage level is selectable (with limited
accuracy) by implementing the voltage divider created
between the external series resistor and the internal 2.5M
resistor. Disabling the LX1992 is achieved by driving the
SHDN pin with a low-level logic signal thus reducing the
device power consumption to less than 0.5
μ
A (typ).
I
NDUCTOR
S
ELECTION AND
O
UTPUT
C
URRENT
L
IMIT
P
ROGRAMMING
Setting the level of peak inductor current to approximately
2X the expected maximum DC input current will minimize
the inductor size, the input ripple current, and the output
ripple voltage. The designer is encouraged to use inductors
that will not saturate at the peak inductor current level. An
inductor value of 47
μ
H is recommended. Choosing a lower
value emphasizes peak current overshoot while choosing a
higher value emphasizes output ripple voltage. The peak
switch current is defined using a resistor placed between the
CS terminal and ground and the I
PEAK
equation is:
The maximum I
PEAK
value is limited by the I
SRC
value
(max. = 0.8A
RMS
). The minimum I
PEAK
value is defined
when R
CS
is zero. The value range for parameters I
MIN
and
I
CS
are provided in the E
LECTRICAL
C
HARACTERISTICS
section of this data sheet. The parameter t
D
is related to
internal operation of the device. A typical value at 25
o
C is
800ns. R
ICS
is the internal current sense resistor connected to
the SRC pin. A typical value at 25
o
C is 200m
. All of these
parameters have an effect on the final I
PEAK
value.
CS
ICS
CS
D
IN
MIN
PEAK
R
R
I
t
L
V
I
I
+
+
=
D
ESIGN
E
XAMPLE
:
Determine I
PEAK
where V
IN
equals 3.0V and R
CS
equals
4.02K
using nominal values for all other parameters.
μ
H
47
The result of this example yields a nominal I
PEAK
of
approximately 225mA.
O
UTPUT
R
IPPLE AND
C
APACITOR
S
ELECTION
Output voltage ripple is a function of the inductor value
(L), the output capacitor value (C
OUT
), the peak switch
current setting (I
PEAK
), the load current (I
OUT
), the input
voltage (V
IN
) and the output voltage (V
OUT
) for a this boost
converter regulation scheme. When the switch is first turned
on, the peak-to-peak voltage ripple is a function of the output
droop (as the inductor current charges to I
PEAK
), the feedback
transition error (i.e., typically 10mV), and the output
overshoot (when the stored energy in the inductor is
delivered to the load at the end of the charging cycle).
Therefore the total ripple voltage is
V
RIPPLE
=
V
DROOP
+
V
OVERSHOOT
+ 10mV
The initial droop can be estimated as follows where the
0.5 value in the denominator is an estimate of the voltage
drop
across the inductor and the FET’s R
DS_ON
: The
×
μ
+
×
+
=
K
02
.
200m
A
0
800ns
3.0V
mA
73
I
PEAK
A
P
P
L
I
C
A
T
I
O
N
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