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參數(shù)資料
| 型號(hào)： | LX1673-09CPW |
| 英文描述： | PWM Controllers |
| 中文描述： | PWM控制器 |
| 文件頁數(shù)： | 15/21頁 |
| 文件大?。?/td> | 554K |
| 代理商： | LX1673-09CPW |
Microsemi
Integrated Products, Power Management
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 15
Copyright
2000
Rev. 0.5i, 2002-07-17
W
M
.
C
LX1671
Multiple Output LoadSHARE PWM
P
RELIMINARY
I N T E G R A T E D P R O D U C T S
THEORY OF OPERATION (CONTINUED)
The circuit in Figure 9 sums a current through a 1M
resistor
(Rb) offsetting the phase 2 error amplifier to create an imbalance
in the L1 and L2 currents. Although there are many ways to
calculate component values the approach taken here is to pick Ra,
Rb, Rin, Vout, and inductor ESR. A value for the remaining
resistor Rf can then be calculated.
The first decision to be made is the current sharing ratio,
follow the previous examples to understand the basics of
LoadSHARE. The most common reason to imbalance the
currents in the two phases is because of limitations on the
available power from the input rails for each phase. Use the
available input power and total required output power to
determine the inductor currents for each phase.
All references are to Figure 9
1) Calculate the voltages V1 and V2.
×
=
×
=
2) Select values for Ra and Rb (Ra is typically 62K
; Rb
is typically 1M
)
3) Calculate the offset voltage Vos at the output of the
offset amplifier
Vout
ESR
1
L
Current
1
L
1
V
+
Vout
ESR
2
L
Current
2
L
2
V
+
(
)
Rb
Ra
Ra
1
V
2
V
2
V
Vos
+
×
=
4) Calculate the value for Rf
(select a value for Rin typically 5K
)
=
1
V
Vout
Vout
Vos
Rin
Rf
Due to the high impedances in this circuit layout can effect the
actual current ratio by allowing some of the switching waveforms
to couple into the current summing path. It may be necessary to
make some adjustment in Rf after the final layout is evaluated.
Also the equation for Rf requires very accurate numbers for the
voltages to insure an accurate result.
B
I
-P
HASE
, L
OAD
SHARE (S
ERIES
R
ESISTOR
M
ETHOD
)
A fourth but less desirable way to produce the ratio current
between the two phases is to add a resistor in series with one of
the inductors. This will reduce the current in the inductor that has
the resistor and increase the current in the inductor of the opposite
phase. The example of Figure 7 can be used to determine the
current ratio by adding the value of the series resistor to the ESR
value of the inductor. The added resistance will lower the overall
efficiency
LoadSHARE ERROR SOURCES
With the high DC feedback gain of this second loop, all phase
timing errors, R
DS(On)
mismatch, and voltage differences across the
half bridge drivers are removed from the current sharing accuracy.
The errors in the current sharing accuracy are derived from the
tolerance on the inductor’s ESR and the input offset voltage
specification of the error amplifier. The equivalent circuit is
shown next for an absolute worst case difference of phase currents
between the two inductors.
VOUT
+
-
ESR L2
ESR L1
Phase 2
Phase 1
Offset
Error
5mV
V1
V2
Figure 6
– Error Amplitude
Nominal ESR of 6m
. ESR ±5%
Max offset Error = 6mV
+5% ESR L1 = 6.3 m
-5% ESR L2 = 5.7 m
1
ESRL
V
V
A
12
=
current
phase
If
OUT
=
mV
75.6
10
6.3
12
V
1
V
3
OUT
=
×
×
=
mV
.6
1
8
mV
6
1
V
2
V
=
+
=
A
32
14.
10
x
5.7
10
x
.6
1
8
2
L
ESR
V
-
2
V
current
Phase
3
3
OUT
=
=
=
Phase 2 current is 2.32A greater than Phase 1.
Input bias current also contributes to imbalance.
A
P
P
L
I
C
A
T
I
O
N
S
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