Microsemi
Integrated Products, Power Management
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 14
Copyright
2000
Rev. 0.5i, 2002-07-17
W
M
.
C
LX1671
Multiple Output LoadSHARE PWM
P
RELIMINARY
I N T E G R A T E D P R O D U C T S
THEORY OF OPERATION
(CONTINUED)
B
I
-P
HASE
, L
OAD
SHARE (P
ROPORTIONAL
M
ETHOD
)
The best topology for generating a current ratio at full load
and proportional between full load and no load is shown in figure
9. The DC voltage difference between LPF1 and VOUT is a
voltage that is proportional to the current flowing in the Phase 1
inductor. This voltage can be amplified and used to offset the
voltage at LPF2 through a large impedance that will not
significantly alter the characteristics of the low pass filter. At no
load there will be no offset voltage and no offset current between
the two phases. This will give the highest efficiency at no load.
Also a speed up capacitor can be used between the offset amplifier
output and the negative input of the Phase 2 error amplifier. This
will improve the transient response of the Phase 2 output current,
so that it will share more equally with phase 1 current during a
transient condition.
The use of a MOSFET input amplifier is required for the buffer
to prevent loading the low pass filter. The gain of the offset
amplifier, and the value of Ra and Rb, will determine the ratio of
currents between the phases at full load. Two external amplifiers
are required or this method.
L1,
Switch
Side
L2,
Switch
Side
62k
+
-
62k
4700pF
62k
Offset
Voltage
Generator
-
+
ESR L1
10m
ESR L2
10m
Vout
1.5V @ 12A
18W
Phase 2
Error Amp
Phase 1
Phase 2
V
1
V2
1.5V
+73.3mV
1.5V
+46.7mV
7.33A
4.67A
+5V @ 7W
+3.3V @ 11W
LPF2
+
-
+
-
1M
4700pF
LPF1
Offset Amp
Vos
Rf
Rin
Ra
Rb
RF2
FB2
PWM
Input
Figure 9 –
LoadSHARE Using Proportional Control
A
P
P
L
I
C
A
T
I
O
N
S