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參數(shù)資料
| 型號： | LVX259 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
| 文件頁數(shù)： | 9/10頁 |
| 文件大?。?/td> | 114K |
| 代理商： | LVX259 |
MC74LVX259
http://onsemi.com
9
H
E
A
1
DIM
A
MIN
0.05
0.35
0.18
9.90
5.10
1.27 BSC
7.40
0.50
1.10
0
0.70
MAX
2.05
0.20
0.50
0.27
10.50
5.45
MIN
0.002
0.014
0.007
0.390
0.201
0.050 BSC
0.291
0.020
0.043
0
MAX
0.081
0.008
0.020
0.011
0.413
0.215
INCHES
MILLIMETERS
8.20
0.85
1.50
10
0.323
0.033
0.059
10
0.90
0.78
0.028
0.035
0.031
A
1
b
c
D
E
e
H
E
L
Q
1
Z
L
E
M
L
E
Q
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
M
L
DETAIL P
VIEW P
c
A
b
e
M
0.13 (0.005)
0.10 (0.004)
1
16
9
8
D
Z
E
SOEIAJ16
M SUFFIX
CASE 96601
ISSUE O
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