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參數(shù)資料
| 型號： | LVX126 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Quad Bus Buffe With 5V−Tolerant Inputs |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 84K |
| 代理商： | LVX126 |
MC74LVX126
http://onsemi.com
4
NOISE CHARACTERISTICS
(Input t
r
= t
f
= 3.0 ns, C
L
= 50 pF, V
CC
= 3.3 V, Measured in SOIC Package)
T
A
= 25
°
C
Symbol
Characteristic
Typ
Max
Unit
V
OLP
Quiet Output Maximum Dynamic V
OL
0.3
0.5
V
V
OLV
Quiet Output Minimum Dynamic V
OL
0.3
0.5
V
V
IHD
Minimum High Level Dynamic Input Voltage
2.0
V
V
ILD
Maximum Low Level Dynamic Input Voltage
0.8
V
ORDERING INFORMATION
Device
Package
Shipping
MC74LVX126D
SOIC14
55 Units / Rail
MC74LVX126M
SOEIAJ14
50 Units / Rail
MC74LVX126MEL
SOEIAJ14
2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Figure 3.
Figure 4.
V
CC
GND
D
O
50%
50% V
CC
t
PLH
t
PHL
OE
O
O
50%
50% V
CC
50% V
CC
t
PZL
t
PLZ
t
PZH
t
PHZ
V
CC
GND
HIGH
IMPEDANCE
V
OL
+0.3 V
V
OH
0.3 V
HIGH
IMPEDANCE
SWITCHING WAVEFORMS
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CONNECT TO V
CC
WHEN
TESTING t
PLZ
AND t
PZL
.
CONNECT TO GND WHEN
TESTING t
PHZ
AND t
PZH
.
1 k
TEST CIRCUITS
Figure 5. Propagation Delay Test Circuit
Figure 6. ThreeState Test Circuit
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PDF描述 |
|---|---|
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| LVX259 | 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LVX138 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3-to-8 Line Decoder With 5V−Tolerant Inputs |
| LVX139 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual 2-to-4 Decoder/Demultiplexer |
| LVX157 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Quad 2-Channel Multiplexe With 5 V−Tolerant Inputs |
| LVX-2 | 制造商:Thomas & Betts 功能描述:Universal Recessed Box And Cover |
| LVX244 | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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