參數(shù)資料
型號: LVX138
廠商: ON SEMICONDUCTOR
英文描述: 3-to-8 Line Decoder With 5V−Tolerant Inputs
文件頁數(shù): 1/8頁
文件大?。?/td> 115K
代理商: LVX138
Semiconductor Components Industries, LLC, 2005
March, 2005 Rev. 2
1
Publication Order Number:
MC74LVX138/D
MC74LVX138
3to8 Line Decoder
With 5VTolerant Inputs
The MC74LVX138 is an advanced high speed CMOS 3to8 line
decoder. The inputs tolerate voltages up to 7.0 V, allowing the
interface of 5.0 V systems to 3.0 V systems.
When the device is enabled, three Binary Select inputs (A0 A2)
determine which one of the outputs (O0 O7) will go Low. When
enable input E3 is held Low or either E2 or E1 is held High, decoding
function is inhibited and all outputs go high. E3, E2, and E1 inputs are
provided to ease cascade connection and for use as an address decoder
for memory systems.
Features
High Speed: t
PD
= 5.5 ns (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 4 A (Max) at T
A
= 25
°
C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: V
OLP
= 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
PbFree Packages are Available*
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
MARKING
DIAGRAMS
A
WL or L
Y
WW or W
=
=
=
=
Assembly Location
Wafer Lot
Year
Work Week
TSSOP16
DT SUFFIX
CASE 948F
SOEIAJ16
M SUFFIX
CASE 966
SOIC16
D SUFFIX
CASE 751B
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
LVX138
AWLYWW
LVX
138
ALYW
LVX138
ALYW
1
16
1
16
1
16
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相關代理商/技術參數(shù)
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