參數(shù)資料
型號: LV5654T
廠商: SANYO SEMICONDUCTOR CO LTD
元件分類: 穩(wěn)壓器
英文描述: SWITCHING REGULATOR, PDSO36
封裝: 0.275 INCH, TSSOP-36
文件頁數(shù): 10/10頁
文件大?。?/td> 117K
代理商: LV5654T
LV5654T
No.A1360-9/10
Notes
(1) Soft start time setting method
The soft start time is set with the capacitor connected between CSOFT* and GND_S.
This IC has an independent soft start function for each channel, so a capacitor must be connected for each channel to
set the soft start (time).
(Description of soft start operation)
(Outline of soft start pin)
(2) Setting the oscillation frequency
The internal oscillation frequency is set by the resistor connected to the RT pin and the capacitor connected to the CT
pin. The waveform generated on CT is a triangular wave with the charging/discharging waveform determined by RT
and CT.
fOSC = 1.32 ×
1
CT × RT
[Hz]
The actual internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other
factors, so the frequency should be confirmed in an actual set.
(3) External input CLK function (CLK_IN)
Switching operation can be synchronized with external clock input (CLK_IN) by using the CLK_IN pin.
External clock (CLK_IN) frequency and input level
When using external clock (CLK_IN) input, input a frequency equal to the internal oscillation frequency +20% or
more to CLK_IN. In addition, the CLK_IN configuration is shown in the figure “CLK_IN (input) equivalent circuit
(outline)” below.
The 0.8V reference voltage and CLK_IN are compared to determine the edges, so input a signal of 0.8V or more
(VCC voltage or less) as the external clock (CLK_IN).
External/internal clock switching
Set the CTL pin Low before switching between the external clock and the internal clock. Switching clocks when
running may give rise to output voltage fluctuations.
Maximum ON duty
The maximum ON duty (Duty_MAX*) of channel 3 to channel 4 is the 85% (typ.) setting. When using the external
clock (CLK_IN), the maximum ON duty (Duty_MAX*) becomes smaller, so care must be taken for the set output
voltage.
(CLK_IN (input) equivalent circuit (outline))
CLK_IN
0.8V
CSOFT* [V]
CSOFT* voltage
VREG
(Internal constant
voltage)
T [s]
VB
(TYP, 0.515 [V])
200k
CSOFT*
GND_S
VB (= 0.515 [V] (TYP))
CSOFT pin charging starts
The output voltage reaches the set voltage
(Output voltage constant)
Soft start time (Tsoft [s])
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