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參數(shù)資料
| 型號(hào)： | LV32 |
| 廠商： | System Logic Semiconductor Co., Ltd. |
| 英文描述： | Quad 2-Input OR Gate |
| 中文描述： | 四2輸入或門 |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大小： | 58K |
| 代理商： | LV32 |
SL74LV32
4
S ystem Logic
Semiconductor
SLS
AC ELECTRICAL CHARACTERISTICS
(C
L
=50 pF, t
LH
= t
HL
= 6.0 ns, V
IL
= 0V, V
IH
=V
CC
, R
L
=1k )
V
CC
Guaranteed Limit
V
25
°
C
-40
°
C ÷ 85
°
C
-40
°
C ÷ 125
°
C
Symbol
Parameter
min
max
min
max
min
max
Unit
t
THL,
(t
TLH
)
Output Transition
Time, Any Output
(Figure 1)
1.2
2.0
*
-
-
60
16
10
-
-
-
75
20
13
-
-
-
90
24
15
ns
t
PHL,
(t
PLH
)
Propagation Delay,
Input A to Output Y
(Figure 1)
1.2
2.0
*
-
-
-
125
20
12
-
-
-
360
25
15
-
-
-
360
30
18
C
I
Input Capacitance
3.0
-
7.0
-
-
-
-
pF
ò
à
=25
°
, V
I
=0V÷V
CC
pF
C
PD
Power Dissipation Capacitance (Per Gate)
44
* - V
CC
= (3.3±0.3) V
P
D
= C
PD
V
CC
(C
L
V
CC
2
f
I
+ (C
L
V
CC
2
fo), f
I
-input frequency, fo- output frequency (MHz)
2
fo) – sum of the outputs
Figure 1. Switching Waveforms
0.1
0.1
0.1
0.1
0.9
0.9
0.9
0.9
V
1
t
PLH
t
HL
T
T HL
t
PH L
t
L H
t
T LH
V
1
V = 0.5 V
1
CC
Input à, B
Output Y
GND
V
OH
V
OL
V
CC
V
1
V
1
PULSE
GENERATOR
DEVICE
UNDER
TEST
V
CC
V
I
V
O
C
L
R
L
R
T
Termination resistance R
T
-
should be equal to Z
OUT
pulse
generators
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