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參數(shù)資料
| 型號(hào)： | LVDS |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | LVDS Description and Family Characteristics |
| 中文描述： | LVDS的描述和家庭特征 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 212K |
| 代理商： | LVDS |
2000 Fairchild Semiconductor Corporation
MS500530
www.fairchildsemi.com
December 2000
Revised December 2000
LVDS Description and Family Characteristics
Low Voltage Differential Signaling (LVDS) defines a
reduced swing, differential I/O technology for high-speed
interface (Figure 1 and Figure 2). Many LVDS devices are
defined by the ANSI/TIA/EIA-644 standard also known as
RS-644. RS-644 compliant devices provide specific I/O
characteristics designed to provide a low noise, low power,
low EMI, high-speed interface. All Fairchild LVDS devices
meet or exceed the ANSI/TIA/EIA-644 standard.
LVDS devices are typically used for point-to-point and lim-
ited multi-drop cable driving configurations. Many Fairchild
LVDS devices offer features to increase performance such
as common mode (Figure 3) for increased application flexi-
bility and failsafe to eliminate false or unexpected states.
Many LVDS devices are pin replacements for existing inter-
face technologies such as RS-422, PECL, and LVPECL.
This compatibility makes upgrades to higher performance
possible with minimum redesign.
FIGURE 1.
FIGURE 2.
FIGURE 3.
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