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參數(shù)資料
| 型號： | LV24030LP |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | AUDIO TUNER, QCC24 |
| 封裝： | 4 X 4 MM, 0.80 MM HEIGHT, VQLP-24 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 171K |
| 代理商： | LV24030LP |
LV24030LP
No.A1003-12/14
Register 0Ah-PW_SCTRL-Power and Soft Control Register (Write-only)
7
6
5
4
3
2
1
0
SS_CTRL
SM_CTRL
EXTCLK
PW_RAD
Bit 7-5
SS_CTRL: Soft stereo control
000b = Soft stereo level 3
001b = Soft stereo off
010b = Soft stereo level 1
100b = Soft stereo level 2
Bit 4-2
SM_CTRL: Soft mute control
000b = Soft mute level 3
001b = Soft mute off
010b = Soft mute level 1
100b = Soft mute level 2
Bit 1
EXTCLK: External clock type
0 = Crystal
1 = Oscillator
Bit 0
PW_RAD: Radio power
0 = Radio OFF
1 = Radio ON
Register 0Bh-SD_OSC-Stereo Decoder Oscillator Register (Write-only)
7
6
5
4
3
2
1
0
SDOSC[7:0]
Bit 7-0
SDOSC[7:0]: Stereo Decoder oscillator DAC
Register 0Ch-CNT_CTRL-Counters Control Register (Write-only)
7
6
5
4
3
2
1
0
CNT1_CLR
CTAB2
CTAB1
CTAB0
SWP_CNT_L
CNT_EN
CNT_SEL
CNT_SET
Bit 7
CNT1_CLR: Clears the counter1
0 = Normal mode
1 = Clears the counter1
Bit 6-4
CTAB[2:0]: Sets the counter2 TAB value
000b
Stop after 2 counts
001b
Stop after 8 counts
010b
Stop after 32 counts
011b
Stop after 128 counts
100b
Stop after 512 counts
101b
Stop after 2048 counts
110b
Stop after 8192 counts
111b
Stop after 32768 counts
Bit 3
SWP_CNT: Counter swap control (0 for swap)
0 = Clock source 1 to counter 2, clock source 2 to counter 1 (swapping)
1 = Clock source 1 to counter 1, clock source 2 to counter 2 (no swap)
Bit 2
CNT_EN: Count start
0 = Count stop
1 = Count start
Bit 1
CNT_SEL: Counter select
0 = Counter1 used for measurement
1 = Counter2 used for measurement
Bit 0
CNT_SET: Set counters bit
0 = Normal mode
1 = Set both counter 1 and counter 2 to FFFFh and keep them set
Register 0Dh-CNT_STAT-Counters Status Register (Read-only)
7
6
5
4
3
2
1
0
Reserved
CNT_RDY
Reserved
Bit 7
Reserved: 1
Bit 6
CNT_RDY: Count over flag
0 = Counting
1 = Count over
Note: CNT_RDY is cleared by setting the CLR_CNT 1 bit of CNT_CTRL register to”1.”
Bit 5-0
Reserved: 0
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