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參數(shù)資料
| 型號： | LUCL9311GP0DT |
| 英文描述： | Line Interface and Line Access Circuit Full-Feature SLIC with High Longitudinal Balance, Ringing Relay,and GR-909 Test Access |
| 中文描述： | 線路接口和線路接入電路全功能用戶接口高縱向平衡，振鈴繼電器，和GR - 909測試訪問 |
| 文件頁數(shù)： | 33/50頁 |
| 文件大?。?/td> | 852K |
| 代理商： | LUCL9311GP0DT |
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Data Sheet
July 2001
Ringing Relay, and GR-909 Test Access
L9311 Full-Feature SLIC with High Longitudinal Balance,
Agere Systems Inc.
33
Applications
(continued)
dc Characteristics
(continued)
Battery Feed
(continued)
Refer to Figure 13 and Figure 14 in this section and to
Figure 12 in the Automatic Battery Switch section.
Starting from the on-hook condition and going through
to a short circuit, the curve passes through two regions:
Region 1: on-hook and low loop currents: the slope cor-
responds to the dc feed resistance of the SLIC (plus
any series resistance). The open-circuit voltage is the
battery voltage less the overhead voltage of the device.
Region 2: current limit: The dc current is limited to a
value determined by V
PROG
. This region of the dc tem-
plate has a high resistance (10 k
).
Notice that the I-V curve is uninterrupted when the
power is shifted from the high-voltage battery to the
low-voltage battery (if auxiliary battery option is used).
This is shown in Figure 12 in the Automatic Battery
Switch section.
Battery Reversal Rate
The rate of battery reverse is controlled or ramped by
capacitors FB1 and FB2. A chart showing FB1 and FB2
values versus typical ramp time is given below. Leave
FB1 and FB2 open if it is not desired to ramp the rate of
battery reversal.
Table 18. FB1 and FB2 Values vs. Typical
Ramp Time
* Typical recommended value for C
FB1
and C
FB2
is less
than 0.033
μ
F.
Longitudinal to Metallic Balance
Longitudinal to metallic balance at PT/PR is specified in
the Electrical Characteristics section of this data sheet.
Supervision
Loop Closure
Loop closure supervision threshold is programmed via
an applied voltage source or ground, through a resistor
at the LCTH input. Loop closure status is presented at
the NSTAT output. NSTAT is an unlatched output that
represents either the loop closure or ring trip status,
depending on the device state. See Table 2 and Table
3 for more details. Loop closure threshold current
(I
LCTH
) is set by:
= I
LCTH
(mA)
where:
R
LCTH
is a resistor from the LCTH node to ground or a
voltage source.
V
LCTH
is ground or an external voltage source.
There is a built-in hysteresis associated with the loop
closure detector. The above equation describes the on-
hook to off-hook threshold. To help prevent false
glitches, the off-hook to on-hook threshold will be a typ-
ical 20% lower than the corresponding on-hook to off-
hook threshold.
Connect a 0.01
μ
F to a 0.1
μ
F capacitor from this node,
LCF to V
CC
to filter the loop closure detector. The
higher the capacitor, the quieter the filter. If loop closure
filtering is not required, leave LCF open.
C
FB1
and C
FB2
*
0.01
μ
F
0.1
μ
F
0.22
μ
F
0.47
μ
F
1.0
μ
F
1.22
μ
F
1.3
μ
F
1.4
μ
F
1.6
μ
F
Transition Time
20 ms
220 ms
440 ms
900 ms
1.8 s
2.25 s
2.5 s
2.7 s
3.2 s
REF
R
LCTH
k
V
LCTH
)
–
(
)
250 V
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