參數(shù)資料
型號(hào)： LUCL9311GP0DT
英文描述： Line Interface and Line Access Circuit Full-Feature SLIC with High Longitudinal Balance, Ringing Relay,and GR-909 Test Access
中文描述： 線路接口和線路接入電路全功能用戶接口高縱向平衡，振鈴繼電器，和GR - 909測(cè)試訪問
文件頁(yè)數(shù)： 11/50頁(yè)
文件大?。?/td> 852K
代理商： LUCL9311GP0DT
Data Sheet
July 2001
Ringing Relay, and GR-909 Test Access
L9311 Full-Feature SLIC with High Longitudinal Balance,
Agere Systems Inc.
11
Pin Information
(continued)
Table 1. Pin Descriptions
(continued)
Pin Symbol
33
DGND
34
RGDET
Type
G
O
Name/Function
Digital Ground.
Ground return for V
DD
current.
Ring Ground Detect.
When high, this open collector output indicates the presence of a
ring ground or a tip ground. This supervision output may be used in ground start, or com-
mon-mode fault detection applications. It has an internal pull-up.
Common-Mode Current Sense.
To program tip or ring ground sense threshold, connect
a resistor to AGND and connect a capacitor to AGND to filter 50 Hz/60 Hz. If unused, the
pin is connected to ground.
Tip/Ring Voltage Output.
This output is a voltage that is directly proportional to the differ-
ential tip/ring current. A resistor from this node to ITR sets the device transimpedance.
Gain shaping for termination impedance with a COMBO I codec is also achieved with a
network from this node to ITR.
Transmit Gain.
A current output which is proportional to the differential current flowing
from tip to ring. Input to AX amplifier. Connect a resistor from this node to VTX to set trans-
mit gain to 300
. Gain shaping for termination impedance with a COMBO I codec is also
achieved with a network from this node to VTX.
Transmit ac Input (Noninverting).
Connect a 0.1
μ
F capacitor from this pin to VTX for dc
blocking.
Transmit ac Output Voltage.
The output is a voltage that is directly proportional to the dif-
ferential ac tip/ring current. This output is connected via a proper interface network to the
codec.
Receive ac Signal Input (Noninverting).
This high-impedance input controls the ac dif-
ferential voltage on tip and ring.
Receive ac Signal Input (Inverting).
This high-impedance input controls the ac differen-
tial voltage on tip and ring.
Analog Ground.
Ground return for V
CC
current.
5 V Analog Power Supply.
5 V supply for analog circuitry.
35
ICM
I
36
VTX
O
37
ITR
I
39
TXI
I
40
VITR
O
41
RCVP
I
42
RCVN
I
43
44
AGND
V
CC
G
P
Operating States
Input State Coding
State control is via a tiered logic system. The device
must initially be set to a primary control state (B3 = 0).
This will set the operational state of the SLIC and
switch. The secondary control table (B3 = 1) is used to
turn on the PPM amplifier or to turn on the test circuitry
and enter a test state. The primary state of the device
(the state of the SLIC and switch) will not change when
entering a secondary control state.
Within the primary control table, each state will set the
SLIC and the switch to a specific mode. The exception
is the tip-amp and ring-amp states. The tip-amp and
ring-amp states will change the configuration of the
switches, but leave the state of the SLIC unchanged
from the previous primary control mode.
Once a primary (device) control state is selected, the
test circuitry can be activated via a secondary control
state. Within the secondary control table, there are test
active modes. Upon entering a test active mode in the
secondary control table, both TESTLEV output and
TESTSIG input are active and the test switches set to
the appropriate condition. (See Test Architecture Dia-
gram, Figure 2.) An exception is the V
REF
test active
mode. Upon entering V
REF
, only the TESTLEV output is
active, and the internal (2.35 V typical) reference volt-
age appears at TESTLEV. In the V
REF
mode, the
TESTSIG input is deactivated.
Once test is on, the user may reverse the battery, enter
the scan, ring, or disconnect modes, in the primary
table, without turning off test. Test may also be deacti-
vated by selecting TESToff in the secondary control
table.
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