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參數(shù)資料
| 型號： | LU3X51FT-J80 |
| 廠商： | Lineage Power |
| 英文描述： | Single-Port 3V 10/100 Ethernet TransceiverTX/FX(單端口3V 10/100以太網(wǎng)收發(fā)器) |
| 中文描述： | 單端口3V的10/100以太網(wǎng)TransceiverTX /外匯（3V的單端口10/100以太網(wǎng)收發(fā)器） |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 110K |
| 代理商： | LU3X51FT-J80 |
Product Brief
May 1998
LU3X51FT-J80 Single-Port
10/100 Ethernet Transceiver TX/FX
Overview
The LU3X51FT-J80 is a fully integrated 10/100 Mbit
physical layer device with transceiver. This part was
designed for 10/100 Mbit applications where board
space, cost, and power are at a premium and strin-
gent functional interoperability is a necessity. The
LU3X51FT-J80 is a powerful device for the forward
migration of legacy 10 Mbit products and non compli-
ant 100 Mbit devices. The LU3X51FT-J80 was
designed from the beginning to conform fully with all
pertinent specifications, from the ISO/IEC 11801 and
EIA/TIA 568 cabling guidelines to ANSI X3.263 TP-
PMD to IEEE* 802.3 ethernet specifications.
Features
I
Single-chip integrated physical layer and trans-
ceiver for 10Base-T and/or 100Base-T functions
I
IEEE* 802.3 compatible 10Base-T and 100Base-T
physical layer interface and ANSI X3.263 TP-PMD
compatible transceiver
I
PECL interface for external FX transceiver
I
Built-in analog 10 Mbit receive filter, removing the
need for external filters
I
Built-in 10 Mbit transmit filter
* IEEEis a registered trademark of The Institute of Electrical and
Electronics Engineers, Inc.
I
10 Mbit PLL exceeding tolerances for both pream-
ble and data jitter
I
100 Mbit PLL, combined with the digital adaptive
equalizer, robustly handles variations in rise-fall
time, excessive attenuation due to channel loss,
duty-cycle distortion, cross talk, and baseline wan-
der
I
Transmit rise-fall time manipulated to provide lower
emissions, amplitude fully compatible for proper
interoperability
I
Programmable scrambler seed for better FCC
compliancy
I
Selectable CIM, Class II support, and powerful MII
drivers for repeater applications
I
IEEE* 802.3u Clause 28 compliant auto negotia-
tion for full 10M and 100M control
I
Fully configurable via pins and management
accesses
I
Extended management support with interrupt
capabilities
I
PHY MIB support
I
Symbol mode option
I
Full LED support
I
Low-power CMOS implementation
I
80-pin QFP package
相關(guān)PDF資料 |
PDF描述 |
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| LU3X54FTL | Quad-FET for 10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器) |
| LU5X31F | Gigabit Ethernet Transceiver(千兆位以太網(wǎng)收發(fā)器) |
| LUC4AB01 | ATM Buffer Manager (ABM)(ATM緩沖管理器 (ABM)) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LU3X54FT | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
| LU3X54FTL | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTLHS208 | 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208 |
| LU3X54FTL-HS208-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTLHS208-DB | 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208-DB |
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