參數(shù)資料
型號: LTM4601AHVY
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING REGULATOR, PBGA133
封裝: 15 X 15 MM, 2.82 MM HEIGHT, LEAD FREE, LGA-133
文件頁數(shù): 29/30頁
文件大?。?/td> 519K
代理商: LTM4601AHVY
LTM4601AHV
8
4601ahvfb
Figure 1. Simplified LTM4601AHV Block Diagram
COMP (Pin A11): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.7V corresponding to zero
sense voltage (zero current).
PGOOD (Pins G12, F11): Output Voltage Power Good
Indicator. Open-drain logic output that is pulled to ground
when the output voltage is not within ±10% of the regula-
tion point, after a 25s power bad mask timer expires.
RUN (Pin A10): Run Control Pin. A voltage above 1.9V
will turn on the module, and when below 1V, will turn
off the module. A programmable UVLO function can be
accomplished by connecting to a resistor divider from
VIN to ground. See Figure 1. This pin has a 5.1V Zener to
ground. Maximum pin voltage is 5V. Limit current into the
RUN pin to less than 1mA.
VOUT_LCL (Pin L12): VOUT connects directly to this pin to
bypass the remote sense amplifier, or DIFFVOUT connects
to this pin when the remote sense amplifier is used.
MTP1, MTP2, MPT3 (Pins C10, D10, D11 ): Extra Mount-
ing Pads. These pads must be left floating (electrical open
circuit) and are used for enhanced solder joint strength.
(See Package Description for Pin Assignment)
pin FuncTions
siMpliFieD block DiagraM
+
INTERNAL
COMP
UVLO
FUNCTION
VIN
SGND
COMP
PGOOD
RUN
VOUT_LCL
>1.9V = ON
<1V = OFF
MAX = 5V
MARG1
MARG0
MPGM
PLLIN
CSS
INTVCC
DRVCC
TRACK/SS
VFB
fSET
50k
39.2k
RSET
19.1k
50k
60.4k
VOUT
1M
5.1V
ZENER
POWER CONTROL
Q1
VIN
4.5V TO 28V
VOUT
2.5V
12A
Q2
10k
0.47H
10k
50k
10k
INTVCC
+
22F
1.5F
CIN
+
COUT
PGND
VOSNS–
VOSNS+
DIFFVOUT
4601AHV F01
4.7F
SGND
R1
R2
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