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參數(shù)資料
| 型號(hào)： | LTM4601AHVY |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, PBGA133 |
| 封裝： | 15 X 15 MM, 2.82 MM HEIGHT, LEAD FREE, LGA-133 |
| 文件頁數(shù)： | 11/30頁 |
| 文件大?。?/td> | 519K |
| 代理商： | LTM4601AHVY |
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LTM4601AHV
19
4601ahvfb
Figure 17. Recommended Layout
(LGA and BGA PCB Layouts Are Identical with the Exception of Circle Pads for BGA. See Package Description.)
applicaTions inForMaTion
SIGNAL
GND
CONTROL
4601AHV F17
VOUT
VIN
PGND
COUT
CIN
Safety Considerations
The LTM4601AHV modules do not provide isolation
from VIN to VOUT. There is no internal fuse. If required,
a slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure.
Layout Checklist/Example
The high integration of LTM4601AHV makes the PCB
board layout very simple and easy. However, to optimize
its electrical and thermal performance, some layout con-
siderations are still necessary.
Use large PCB copper areas for high current path, in-
cluding VIN, PGND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
Place high frequency ceramic input and output capaci-
tors next to the VIN, PGND and VOUT pins to minimize
high frequency noise.
Place a dedicated power ground layer underneath the
unit. Refer frequency synchronization source to power
ground.
To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
Do not put vias directly on pads unless they are capped.
Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
Figure17givesagoodexampleoftherecommendedlayout.
Frequency Adjustment
TheLTM4601AHVisdesignedtotypicallyoperateat850kHz
across most input conditions. The fSET pin is normally
left open. The switching frequency has been optimized
for maintaining constant output ripple noise over most
operating ranges. The 850kHz switching frequency and
the 400ns minimum off time can limit operation at higher
duty cycles like 5V to 3.3V, and produce excessive induc-
tor ripple currents for lower duty cycle applications like
28V to 5V. The 5VOUT and 3.3VOUT drop out curves are
modified by adding an external resistor on the fSET pin to
allow for lower input voltage operation, or higher input
voltage operation.
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