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參數資料
| 型號： | LTCEMSE-1#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO16 |
| 封裝： | 0.150 INCH, LEAD FREE, PLASTIC, MSOP-16 |
| 文件頁數： | 8/28頁 |
| 文件大?。?/td> | 337K |
| 代理商： | LTCEMSE-1#PBF |
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LTC3851-1
16
38511f
APPLICATIONS INFORMATION
is used to match the shifted common mode voltage. The
top two current sources are of the same amplitude. In the
coincident mode, the TK/SS voltage is substantially higher
than 0.8V at steady-state and effectively turns off D1. D2
and D3 will therefore conduct the same current and offer
tight matching between VFB and the internal precision
0.8V reference. In the ratiometric mode, however, TK/SS
equals 0.8V at steady-state. D1 will divert part of the bias
current to make VFB slightly lower than 0.8V.
Although this error is minimized by the exponential I-V
characteristic of the diode, it does impose a nite amount
of output voltage deviation. Furthermore, when the master
supply’s output experiences dynamic excursion (under
load transient, for example), the slave channel output will
be affected as well. For better output regulation, use the
coincident tracking mode instead of ratiometric.
INTVCC Regulator
The LTC3851-1 features a PMOS low dropout linear
regulator (LDO) that supplies power to INTVCC from the
VIN supply. INTVCC powers the gate drivers and much of
the LTC3851-1 ’s internal circuitry. The LDO regulates the
voltage at the INTVCC pin to 5V.
The LDO can supply a peak current of 50mA and must
be bypassed to ground with a minimum of 2.2μF ceramic
capacitor or low ESR electrolytic capacitor. No matter
what type of bulk capacitor is used, an additional 0.1μF
ceramic capacitor placed directly adjacent to the INTVCC
and GND pins is highly recommended. Good bypassing
is needed to supply the high transient currents required
by the MOSFET gate drivers.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3851-1 to be
exceeded. The INTVCC current, which is dominated by the
gate charge current, is supplied by the 5V LDO.
Power dissipation for the IC in this case is highest and
is approximately equal to VIN IINTVCC. The gate charge
current is dependent on operating frequency as discussed
in the Efciency Considerations section. The junction tem-
perature can be estimated by using the equations given in
Note 3 of the Electrical Characteristics. For example, the
LTC3851-1 INTVCC current is limited to less than 17mA
from a 36V supply in the GN package:
TJ = 70°C + (17mA)(36V)(90°C/W) = 125°C
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous conduction mode (MODE/PLLIN
= INTVCC) at maximum VIN.
Topside MOSFET Driver Supply (CB, DB)
An external bootstrap capacitor CB connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. Capacitor CB intheFunctionalDiagramischarged
though external diode DB from INTVCC when the SW pin
Figure 4. Setup for Coincident and Ratiometric Tracking
Figure 5. Equivalent Input Circuit of Error Amplier
R3
VOUT
R4
(4a) Coincident Tracking Setup
TO
VFB
PIN
R3
VMASTER
R4
TO
TK/SS
PIN
R1
R3
VOUT
R4
R2
38511 F04
(4b) Ratiometric Tracking Setup
TO
VFB
PIN
TO
TK/SS
PIN
VMASTER
–
+
II
D1
TK/SS
0.8V
VFB
D2
D3
38511 F05
EA
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