參數(shù)資料
型號: LTC4315CDE#TRPBF
廠商: Linear Technology
文件頁數(shù): 17/20頁
文件大?。?/td> 0K
描述: IC 2WIRE BUS BUFFER 12DFN
標準包裝: 2,500
類型: 2線總線緩沖器
Tx/Rx類型: I²C Logic
電容 - 輸入: 10pF
電源電壓: 2.9 V ~ 5.5 V
電流 - 電源: 8.1mA
安裝類型: 表面貼裝
封裝/外殼: 12-WFDFN 裸露焊盤
供應商設備封裝: 12-DFN(4x3)
包裝: 帶卷 (TR)
LTC4315
6
4315f
PIN FUNCTIONS
ACC (Pin 5): Three-State Acceleration Strength Selector.
This pin controls the current strength of the rise time
accelerators on both the input and output sides. Rise
time accelerators (RTAs) are disabled if ACC is high,
in current source mode if ACC is open and in the slew
limited switch mode if ACC is low. See Table 1 in the
Applications Information section. Grounding VCC2 selec-
tively disables the output side RTAs independent of the
ACC setting.
DISCEN (Pin 2): Enable Input to Disconnect Stuck Bus.
When this pin is high, stuck busses are automatically
disconnected after a timeout period of 45ms and FAULT
is pulled low. Up to sixteen clock pulses are subsequently
applied to SCLOUT. When DISCEN is low, stuck busses
are neither disconnected nor clocked but FAULT is pulled
low. Connect to GND if unused.
ENABLE (Pin 1): Connection Enable Input. When driven
low, the ENABLE pin isolates SDAIN and SCLIN from
SDAOUT and SCLOUT, asserts READY low, disables rise
time accelerators and inhibits automatic clock and stop bit
generation during a bus stuck low fault condition. When
driven high, the ENABLE pin connects SDAIN and SCLIN
to SDAOUT and SCLOUT after a stop bit or bus idle has
been detected on both busses. Driving ENABLE high also
enables automatic clock generation during a fault condition,
if DISCEN is tied high. During a fault condition, a rising
edge on the ENABLE pin forces a connection between
SDAIN and SDAOUT and SCLIN and SCLOUT. When using
the LTC4315 in a Hot Swap application with staggered
pins, connect a 10k resistor between ENABLE and GND
to ensure correct functionality. Connect to VCC if unused.
Exposed Pad (DE12 Package Only): Exposed pad may
be left open or connected to device GND.
FAULT (Pin 8): Stuck Bus Fault Output. This open drain
N-channel MOSFET output pulls low if a simultaneous
high on SCLOUT and SDAOUT does not occur in 45ms. In
normal operation FAULT is high. Connect a pull-up resis-
tor, typically 10k, from this pin to the bus pull-up supply.
Leave open or tie to GND if unused.
GND (Pin 6): Device Ground.
READY (Pin 7): Connection Ready Status Output. This
open drain N-channel MOSFET output pulls low when
the input and output sides are disconnected. READY is
pulled high when ENABLE is high and a connection has
been established between the input and output. Connect
a pull-up resistor, typically 10k, from this pin to the bus
pull-up supply. Leave open or tie to GND if unused.
SCLIN (Pin 4): Serial Bus 1 Clock Input/Output. Connect
this pin to the SCL line on the upstream bus. Connect an
external pull-up resistor or current source between this
pin and the bus supply. The bus supply must be ≥ VCC
if rise time accelerators are enabled. Do not leave open.
SCLOUT (Pin 3): Serial Bus 2 Clock Input/Output. Con-
nect this pin to the SCL bus segment where stuck low
recovery is desired. Connect an external pull-up resistor
or current source between this pin and the bus supply.
The bus supply must be ≥ VCC2 if rise time accelerators
are enabled. Do not leave open.
SDAIN (Pin 9): Serial Bus 1 Data Input/Output. Connect
this pin to the SDA line on the upstream bus. Connect an
external pull-up resistor or current source between this pin
and the bus supply. The bus supply must be ≥ VCCifrisetime
accelerators are enabled. Do not leave open.
SDAOUT (Pin 10): Serial Bus 2 Data Input/Output. Con-
nect this pin to the SDA bus segment where stuck low
recovery is desired. Connect an external pull-up resistor
or current source between this pin and the bus supply.
The bus supply must be ≥ VCC2 if rise time accelerators
are enabled. Do not leave open.
VCC (Pin 12): Power Supply Voltage. Power this pin from
a supply between 2.9V and 5.5V. Bypass with at least
0.01μF to GND.
VCC2 (Pin 11): SDAOUT, SCLOUT Rise Time Accelerator
Power Supply Voltage. When powering VCC2, use a supply
voltage ranging from 2.25V to 5.5V and bypass with at
least 0.01μF to GND. Output side rise time accelerators are
active if VCC2 ≥ 2.25V and ACC is low or open. Grounding
VCC2 disables output side rise time accelerators indepen-
dent of the state of ACC.
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相關代理商/技術參數(shù)
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