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參數(shù)資料
| 型號： | LTC4302IMS-1#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 298K |
| 描述： | IC BUFFER 2-WIRE BUS 10-MSOP |
| 標準包裝： | 2,500 |
| 類型： | 熱交換開關(guān) |
| 應(yīng)用： | 通用型緩沖器/總線擴展器 |
| 內(nèi)部開關(guān)： | 是 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
LTC4302-1/LTC4302-2
15
sn430212 430212fs
OPERATIO
pulls down the voltage on the 50pF side with a delay of
55ns. This delay is always positive and is a function of
supply voltage, temperature and the pull-up resistors and
equivalent bus capacitances on both sides of the bus. The
Typical Performance Characteristics section shows t
PHL
as a function of temperature and voltage for 10k pull-up
resistors and 100pF equivalent bus capacitance on both
sides of the part. Larger output capacitances translate to
longer delays (up to 150ns). Users must quantify the
difference in propagation times for a rising edge versus a
falling edge in their systems and adjust setup and hold
times accordingly.
General Purpose Input/Outputs (GPIOs)
The LTC4302-1 provides two general purpose input/out-
put pins (GPIOs) that can be configured as inputs, open-
drain outputs or push-pull outputs. In push-pull mode, at
V
CC
= 2.7V, the typical pull-up impedance is 670& and the
typical pull-down impedance is 35&, making the GPIO
pull-downs capable of driving LEDs. The user must take
care to minimize the power dissipation in the pulldown
device. LEDs should have series resistors added to limit
current and the voltage drop across the internal pulldown
if their forward drop is less than about V
CC
-0.7V. Pullup
resistors should be sized to allow the internal pulldowns to
pull the GPIO pins below 0.7V. In open-drain output mode,
the user provides the logic high by connecting a resistor
to an external supply voltage. The external supply voltage
can range from 2.2V to 5.5V independent of the V
CC
voltage.
The LTC4302-2 replaces one GPIO pin with a V
CC2
pin and
provides only one GPIO.
Rise Time Accelerators
Rise time accelerator circuits on all four SDA and SCL pins
allow the user to choose weaker DC pull-up currents on the
bus, reducing power consumption while still meeting
system rise time requirements. A master on the bus may
activate the accelerators on the backplane side, the card
side, neither or both, by writing the LTC4302s registers as
described above. When activated, the accelerators switch
in 2mA of current at V
CC
= 2.7V and 9mA at V
CC
= 5.5V
during positive bus transitions to quickly slew the SDA and
SCL lines once their DC voltages exceed 0.6V and the initial
rise rate on the pin exceeds 0.8V/祍. Using a general rule
of 20pF of capacitance for every device on the bus (10pF
for the device and 10pF for interconnect), choose a pull-up
current so that the bus will rise on its own at a rate of at
least 0.8V/祍 to guarantee activation of the accelerators.
For example, assume an SMBus system with V
CC
= 3.3V,
a 10k pull-up resistor and equivalent bus capacitor of
200pF. The rise time of an SMBus system is calculated
from (V
IL(MAX)
0.15V) to (V
IH(MIN)
+ 0.15V) or 0.65V to
2.25V. It takes an RC circuit 0.92 time constants to
traverse this voltage for a 3.3V supply; in this case, 0.92 "
(10k " 200pF) = 1.84祍. Thus, the system exceeds the
maximum allowed rise time of 1祍 by 84%. However,
using the rise time accelerators, which are activated at a
DC threshold below 0.65V, the worst-case rise time is
(2.25V 0.65V) " 200pF/1mA = 320ns, which meets the
1祍 rise time requirement.
CONN Register Reset
Grounding CONN resets the registers to their default state
as specified in Tables 2 and 3. In the default state, the
backplane side is disconnected from the card side, the rise
time accelerators are disabled and the GPIOs are set in
open-drain output mode with the N-Channel MOSFET
open-drain pulldown turned off. Connecting a weak resis-
tor from CONN to ground on the I/O card and using a
staggered connector with CONN connecting to the short-
est pin guarantee glitch-free live board insertion and
removal. When the CONN voltage is brought back to V
CC
the registers remain in the default state and can then be
read or written to.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC4302IMS-2 | 功能描述:IC BUFFER BUS 2WR ADDRESS 10MSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關(guān) 應(yīng)用:通用 內(nèi)部開關(guān):是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-TDFN-EP（3x3） 包裝:管件 |
| LTC4302IMS-2#PBF | 功能描述:IC BUFFER 2-WIRE BUS 10-MSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關(guān) 應(yīng)用:通用 內(nèi)部開關(guān):是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-TDFN-EP（3x3） 包裝:管件 |
| LTC4302IMS-2#TR | 功能描述:IC BUFFER BUS 2WR ADDRESS 10MSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關(guān) 應(yīng)用:通用 內(nèi)部開關(guān):是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-TDFN-EP（3x3） 包裝:管件 |
| LTC4302IMS-2#TRPBF | 功能描述:IC BUFFER 2-WIRE BUS 10-MSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關(guān) 應(yīng)用:通用 內(nèi)部開關(guān):是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-TDFN-EP（3x3） 包裝:管件 |
| LTC4303CDD | 制造商:Linear Technology 功能描述:Hot Swappable Bus Buffer 8-Pin DFN EP |
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