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參數(shù)資料
| 型號： | LTC3810IG#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO28 |
| 封裝： | 5.30 MM, PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 24/36頁 |
| 文件大?。?/td> | 495K |
| 代理商： | LTC3810IG#TR |
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LTC3810
30
3810fb
error on the tracking voltage depending on the absolute
values of the tracking resistive divider.
By selecting different resistors, the LTC3810 can achieve
different modes of tracking including the two in Figure 15.
So which mode should be programmed? While either
mode in Figure 15 satises most practical applications,
there do exist some tradeoffs. The ratiometric mode saves
a pair of resistors, but the coincident mode offers better
output regulation. This can be better understood with the
help of Figure 17. At the input stage of the slave IC’s error
amplier, two common anode diodes are used to clamp
the equivalent reference voltage and an additional diode is
used to match the shifted common mode voltage. The top
two current sources are of the same amplitude. In the
coincident mode, the TRACK/SS voltage is substantially
higher than 0.8V at steady state and effectively turns off D1.
D2 and D3 will therefore conduct the same current and
offer tight matching between VFB2 and the internal preci-
sion 0.8V reference. In the ratiometric mode, however,
TRACK/SS equals 0.8V at steady state. D1 will divert part
of the bias current to make VFB2 slightly lower than 0.8V.
Although this error is minimized by the exponential I-V
characteristic of the diode, it does impose a nite amount
of output voltage deviation. Furthermore, when the master
IC’s output experiences dynamic excursion (under load
transient, for example), the slave IC output will be affected
as well.
For better output regulation, use the coincident
tracking mode instead of ratiometric.
Phase-Locked Loop and Frequency Synchronization
The LTC3810 has a phase-locked loop comprised of an
internal voltage controlled oscillator and phase detector.
This allows the top MOSFET turn-on to be locked to the
rising edge of an external source. The frequency range
of the voltage controlled oscillator is ±30% around the
center frequency fO. The center frequency is the operating
frequency discussed in the Operating Frequency section.
The LTC3810 incorporates a pulse detection circuit that
will detect a clock on the MODE/SYNC pin. In turn, it will
turn on the phase-locked loop function. The pulse width of
the clock has to be greater than 400ns and the amplitude
of the clock should be greater than 2V.
The internal oscillator locks to the external clock after
the second clock transition is received. When external
synchronization is detected, LTC3810 will operate in
forced continuous mode. If an external clock transition
is not detected for three successive periods, the internal
oscillator will revert to the frequency programmed by the
RON resistor.
During the start-up phase, phase-locked loop function is
disabled. When LTC3810 is not in synchronization mode,
PLL/LPF pin voltage is set to around 1.215V. Frequency
synchronization is accomplished by changing the inter-
nal on-time current according to the voltage on the
PLL/LPF pin.
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the ex-
ternal and internal pulses. This type of phase detector will
not lock up on input frequencies close to the harmonics
of the VCO center frequency. The PLL hold-in range, ΔfH,
is equal to the capture range,
ΔfC:
ΔfH = ΔfC = ±0.3 fO
The output of the phase detector is a complementary pair of
current sources charging or discharging the external lter
network on the PLL/LPF pin. A simplied block diagram
is shown in Figure 18.
Figure 18. Phase-Locked Loop Block Diagram
If the external frequency (fMODE/SYNC) is greater than the
oscillator frequency fO, current is sourced continuously,
pulling up the PLL/LPF pin. When the external frequency
APPLICATIONS INFORMATION
DIGITAL
PHASE/
FREQUENCY
DETECTOR
MODE/SYNC
PLL/LPF
2.4V
CLP
3810 F18
RLP
VCO
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