參數(shù)資料
型號： LTC3766MPUFD#TRPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 316 kHz SWITCHING FREQ-MAX, PQCC28
封裝： 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-28
文件頁數(shù)： 25/60頁
文件大?。?/td> 607K
代理商： LTC3766MPUFD#TRPBF
LTC3766
31
3766f
APPLICATIONS INFORMATION
Note that the ratios of the resistor dividers on the SW
and VS+ pins must be the same for ripple cancellation to
operate properly. This requires that:
KR =
R2
R1
+R2
=
69k R4
+R3 69k +R4
(
)
where the 69k accounts for the internal resistance on the
VS+ and VS– pins.
LOAD CURRENT (A)
0
OUTPUT
VOLTAGE
(V)
1
2
3
4
6
5
10
15
20
3766 F16
25
30
5
VIN = 72V
VIN = 36V
Figure 16. Typical Current Limit Performance
Figure 15. Setting RIPK for High VOUT Applications
Figure 14a. Setting the Average Current Limit (RIPK)
Figure 14b. Setting RIPK with No Differential Amplifier
VS+
VS–
RIPK
LTC3766
MAIN
XFMR
VOUT
3766 F14a
VSW
VSOUT
VFB
SW
IPK
RB
RLOAD
RA
VS+
VS–
RIPK
LTC3766
MAIN
XFMR
VOUT
3766 F14
VSW
VSOUT
SW
IPK
VS–
160k
VS+
GND
RIPK
LTC3766
MAIN
XFMR
VOUT
3766 F15
VSW
VSOUT
SW
R1
R2
IPK 120k
R3
R4
For resistor sense mode, place a resistor on the IPK pin
that is chosen using:
RIPK =
KRLIPK
17.6nF
(
)RSENSE
where LIPK is the inductance of the output inductor at I =
ILIM(AVG). For low VOUT applications where no SW node
divider is needed, KR = 1. For current transformer mode,
use:
RIPK =
KRLIPK
1.32nF
(
)KCTRSENSE
NP
NS
When the LTC3766 is in current limit and the output volt-
age is very low, the control of the output current will be
limited by the minimum on-time of the converter. Once this
minimum on-time has been reached, further decreases in
outputvoltageduringcurrentlimitwillresultinaninductor
current that continues to rise, until the overcurrent limit
is reached. This will cause the LTC3766 to shut down and
attempt a restart, resulting in a hiccup mode of operation.
Typical average current limit performance is illustrated
in Figure 16. Note that the average current delivered to
the load is held substantially constant as the output volt-
age is decreased down to a low level, at which point the
converter will enter hiccup mode. Depending upon the
particular application, hiccup mode is entered either due
to the loss of secondary-side bias voltage (UVLO) or due
to an overcurrent fault.
相關(guān)PDF資料
PDF描述
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