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參數(shù)資料
| 型號： | LTC3766MPUFD#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 316 kHz SWITCHING FREQ-MAX, PQCC28 |
| 封裝： | 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-28 |
| 文件頁數(shù)： | 38/60頁 |
| 文件大?。?/td> | 607K |
| 代理商： | LTC3766MPUFD#PBF |
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LTC3766
43
3766f
APPLICATIONS INFORMATION
becausenoamountoftweakingtotheITHcomponentscan
cancel their effect. Also, any theoretical analysis of loop
response only considers first order non-ideal component
behavior. Consequently, it is important that a final stability
check be made with production layout and components.
StabilizingthevoltageloopoftheLTC3766isaccomplished
by using the error amp to provide a gain from VOUT to
ITH that compensates for the control to output gain from
ITH to VOUT. The DC component of the ITH to VOUT gain
is approximately:
ADC1=
1
29.3RSENSE
2LfSWROUT
2LfSW +ROUT
for resistor sense mode, and:
ADC1=
NP
2.2KCTNSRSENSE
2LfSWROUT
2LfSW +ROUT
for current transformer mode. Since the LTC3766 utilizes
current mode control, the ITH to VOUT transfer function
can be basically characterized by one pole and one zero.
The pole is given approximately by:
fP =
1
2
πROUTC
+
1
πfSWLC
and the zero is given by:
fZ =
1
2
πRESRC
where RESR is the ESR of the output capacitance C. Note
that the frequency of this zero will vary substantially de-
pending on the type of capacitor chosen.
TheLTC3766usesinternalslopecompensationtostabilize
the current loop. The amount of slope that is effectively
seen at the current sense (IS+) input is:
SR = KfSW(26mV)
for RSENSE mode and:
SR = KfSW(0.35V)
for current transformer mode, where K = 1 for duty cycles
less than 50% and K = 2 for duty cycles greater than 50%.
Formostapplications,thisinternalslopecompensationwill
be on the order of the down slope of the inductor, which
provides adequate current-loop stability without introduc-
ing excessive phase shift at the crossover frequency. For
phase margin calculations, assume that two poles exist
at one-half of the switching frequency. Use of an abnor-
mally high valued inductor will produce additional phase
shift due to slope compensation, thereby forcing a lower
voltage loop crossover frequency to ensure stability. In
order to avoid having either too little or too much slope
compensation, make sure that the inductor satisfies the
following inequalities:
2VOUTRSENSE
3SR@K=2
<L <
3VOUTRSENSE
SR@K=1
for resistor sense mode and:
2VOUTRSENSEKCTNS
3SR@K=2NP
<L <
3VOUTRSENSEKCTNS
SR@K=1NP
for current transformer mode.
In some cases, the LTC3766 and LTC3765 will be in delay
phase-out mode at low input voltages. This cycle-by-cycle
reduction of the PG and FG turn-on delays has the effect
of reducing the amount of slope compensation by ap-
proximately 20% to 40%. Consequently, a higher value
of inductance may be required to maintain current-loop
stability during operation in delay phase-out mode.
Thecompensationnetworkistypicallyconfiguredasshown
in Figure 29. The objective of this network is to add DC
gain for excellent load regulation while providing good
phase margin in the voltage loop at the highest possible
crossover frequency. Normally this is achieved by adding
a dominant pole at very low frequency and a zero well be-
fore the crossover frequency to remove most of the phase
Figure 29. ITH Compensation Network
0.6V
FB
ITH
R1
R3
R2
VOUT
C1
3766 F29
C2
C3
(OPT)
gm = 2.7mS
LTC3766
+
–
EA
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