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參數(shù)資料
| 型號： | LTC3738 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 16-Bit Buffer/Driver With 3-State Outputs 48-TSSOP -40 to 85 |
| 中文描述： | 三相降壓控制器與Active定位電壓英特爾VRM9/VRM10 |
| 文件頁數(shù)： | 25/32頁 |
| 文件大?。?/td> | 316K |
| 代理商： | LTC3738 |
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25
LTC3738
3738f
APPLICATIOU
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If C
LOAD
is greater
than 2% of C
OUT
, the switch rise time should be controlled
so that the load rise time is limited to approximately
1000 R
SENSE
C
LOAD
. Thus a 250
μ
F capacitor and a 2m
R
SENSE
resistor would require a 500
μ
s rise time, limiting
the charging current to about 1A.
W
U
U
Design Example (Using Three Phases)
As a design example, assume V
IN
= 12V(nominal), V
IN
=
20V(max), V
OUT
= 1.3V, I
MAX
= 45A, f = 400kHz and the
AVP slope is 1mV/A. The inductance value is chosen first
based upon a 30% ripple current assumption. The highest
value of ripple current in each output stage occurs at the
maximum input voltage.
L
V
f
( )
V
V
V
kHz
H
μ
A
V
V
OUT
OUT
IN
=
=
(
≥
)(
)(
)
1
1 3
.
400
0 68
.
30
15
1
1 3
20
%
.
Using L = 0.6
μ
H, a commonly available value results in
34% ripple current. The worst-case output ripple for the
three stages operating in parallel will be less than 11% of
the peak output current.
R
SENSE1,
R
SENSE2
and R
SENSE3
can be calculated by using
a conservative maximum sense current threshold of 65mV
and taking into account half of the ripple current:
R
mV
A
SENSE
=
+
=
65
15
1
34
2
0 0037
.
%
Use a commonly available 0.003
sense resistor.
Take R
AVP
as recommended value 100
, the R
PREAVP
is:
R
mV A
1
PREAVP
=
=
/
0 003
.
100
300
Next verify the minimum on-time is not violated. The
minimum on-time occurs at maximum V
CC
:
V
V
IN MAX
(
)
20
t
V
V
kHz
ns
ON MIN
OUT
)
=
( )
=
(
)
=
.3
400
162
The output voltage will be set by the VID code according
to Table 1.
The power dissipation on the topside MOSFET can be
estimated. Using a Siliconix Si7390DP for example, R
DS(ON)
= 13.5m
, C
MILLER
= 2.1nC/15V = 140pF. At maximum
input voltage with T(estimated) = 50
°
C:
P
V
V
C
C
A
pF
V
V
V
kHz
W
MAIN
≈
( )
+
(
°
°
)
[
]
+
( )
( )( )
(
)(
)
+
(
)
=
1 3
20
1
0 005 50
.
25
0 0135
.
45
2
140
1
–1 8
5
1
1 8
.
400
0 51
.
2
2
.
using a Siliconix Si7356DP as bottom side MOSFET.
The worst-case power dissipation by the synchronous
MOSFET under normal operating conditions at elevated
ambient temperature and estimated 50
°
C junction tem-
perature rise is:
P
V
V
V
A
W
SYNC
=
(
) (
)
=
20
1 3
.
20
15
1 25 0 004
.
1 05
.
.
A short circuit to ground will result in a folded back current
of:
I
mV
)
+
m
ns
0 6
.
V
H
A
SC
≈
(
(
μ
)
=
25
2 3
1
2
150
20
7 5
.
with a typical value of R
DS(ON)
and d = (0.005/
°
C)(50
°
C) =
0.25. The resulting power dissipated in the bottom MOSFET
is:
P
SYNC
= (7.5A)
2
(1.25)(0.004
)
≈
0.28W
which is less than one third of the normal, full load
conditions. Incidentally, since the load no longer dissi-
pates any power, total system power is decreased by over
90%. Therefore, the system actually cools significantly
during a shorted condition!
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