參數(shù)資料
型號(hào)： LTC3738
廠商： Linear Technology Corporation
英文描述： 16-Bit Buffer/Driver With 3-State Outputs 48-TSSOP -40 to 85
中文描述： 三相降壓控制器與Active定位電壓英特爾VRM9/VRM10
文件頁(yè)數(shù)： 16/32頁(yè)
文件大?。?/td> 316K
代理商： LTC3738
16
LTC3738
3738f
The curve is generated by forcing a constant input current
into the gate of a common source, current source loaded
stage and then plotting the gate voltage versus time. The
initial slope is the effect of the gate-to-source and the gate-
to-drain capacitance. The flat portion of the curve is the
result of the Miller capacitance effect of the drain-to-
source capacitance as the drain drops the voltage across
the current source load. The upper sloping line is due to
the drain-to-gate accumulation capacitance and the gate-
to-source capacitance. The Miller charge (the increase in
coulombs on the horizontal axis from a to b while the curve
is flat) is specified for a given V
DS
drain voltage, but can be
adjusted for different V
DS
voltages by multiplying by the
ratio of the application V
DS
to the curve specified V
DS
values. A way to estimate the C
MILLER
term is to take the
change in gate charge from points a and b on a manufac-
turers data sheet and divide by the stated V
DS
voltage
specified. C
MILLER
is the most important selection criteria
for determining the transition loss term in the top MOSFET
but is not directly specified on MOSFET data sheets. C
RSS
and C
OS
are specified sometimes but definitions of these
parameters are not included.
When the controller is operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
MainSwitchDutyCycle
V
V
SynchronousSwitchDutyCycle
V
V
V
OUT
IN
IN
OUT
IN
=
=
–
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
P
V
V
I
N
R
V
I
N
R
(
C
V
V
V
P
V
V
V
I
N
R
MAIN
OUT
IN
2
MAX
DS ON
(
IN
MAX
2
DR
MILLER
CC
TH MIN
(
TH MIN
(
SYNC
IN
OUT
IN
MAX
DS ON
(
=
+
(
)
+
)(
)
+
( )
=
+
(
)
2
2
1
1
1
1
δ
δ
)
)
)
)
–
–
where N is the number of output stages,
δ
is the tempera-
ture dependency of R
DS(ON)
, R
DR
is the effective top driver
resistance (approximately 2
at V
GS
= V
MILLER
), V
IN
is the
drain potential andthe change in drain potential in the
particular application. V
TH(MIN)
is the data sheet specified
typical gate threshold voltage specified in the power
MOSFET data sheet. C
MILLER
is the calculated capacitance
using the gate charge curve from the MOSFET data sheet
and the technique described above.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
IN
< 12V, the
high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 12V, the transition losses
rapidly increase to the point that the use of a higher
R
DS(ON)
device with lower C
RSS
actually provides higher
efficiency. The synchronous MOSFET losses are greatest
at high input voltage when the top switch duty factor is low
or during a short circuit when the synchronous switch is
on close to 100% of the period.
The term (1 +
δ
) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs temperature curve, but
δ
= 0.005/
°
C can be used as an approximation for low
voltage MOSFETs.
APPLICATIOU
W
U
U
V
DS
V
IN
3738 F04
V
GS
MILLER EFFECT
Q
IN
a
b
C
MILLER
= (Q
B
– Q
A
)/V
DS
V
GS
V
Figure 4. Gate Charge Characteristic
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