參數(shù)資料
型號: LTC3554EUD-2#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.6 A BATTERY CHARGE CONTROLLER, 2590 kHz SWITCHING FREQ-MAX, PQCC20
封裝: 3 X 3 MM, 0.75 MM HEIGHT, LEAD FREE, PLASTIC, QFN-20
文件頁數(shù): 14/36頁
文件大?。?/td> 418K
代理商: LTC3554EUD-2#TRPBF
LTC3554/LTC3554-2
21
35542fb
PGOOD Operation
The PGOOD pin is an open-drain output which indicates
that all enabled step-down switching regulators have
reached their nal regulation voltage. It goes high-imped-
ance 230ms after all enabled switching regulators reach
92% of their regulation value. The delay allows ample time
for an external processor to reset itself. PGOOD may be
used as a power-on reset to a microprocessor powered
by the step-down switching regulators. Since PGOOD is
an open-drain output, a pull-up resistor to an appropriate
power source is needed. A suggested approach is to con-
nect the pull-up resistor to one of the step-down switching
regulator output voltages so that power is not dissipated
while the regulators are disabled.
In hard reset, the PGOOD pin is placed in high impedance
state to minimize current draw from the battery in this
ultralow power state. This will cause the PGOOD pin to
signal the wrong state (high level) if it is pulled up to a
supply that is not shut down in hard reset (e.g. BAT). If
PGOOD is pulled up to one of the step-down switching
regulator outputs then the PGOOD pin will indicate the
correct state (low level) in hard reset because the switch-
ing regulator output will be low.
Normal Operating Mode (STBY Pin Low)
In normal mode (STBY pin low), the regulators perform
as traditional constant-frequency current mode switch-
ing regulators. Switching frequency is determined by an
internal oscillator whose frequency is selectable via the
FSEL pin. An internal latch is set at the start of every
oscillator cycle, turning on the main P-channel MOSFET
switch. During each cycle, a current comparator compares
the inductor current to the output of an error amplier.
The output of the current comparator resets the internal
latch, which causes the main P-channel MOSFET switch
to turn off and the N-channel MOSFET synchronous
rectier to turn on. The N-channel MOSFET synchronous
rectier turns off at the end of the clock cycle, or when
the current through the N-channel MOSFET synchronous
rectier drops to zero, whichever happens rst. Via this
mechanism, the error amplier adjusts the peak inductor
current to deliver the required output power. All neces-
sary compensation is internal to the step-down switching
regulator requiring only a single ceramic output capacitor
for stability.
At light load and no-load conditions, the buck automatically
switches to a power-saving hysteretic control algorithm
that operates the switches intermittently to minimize
switching losses. Known as Burst Mode operation, the
buck cycles the power switches enough times to charge
the output capacitor to a voltage slightly higher than
the regulation point. The buck then goes into a reduced
quiescent current sleep mode. In this state, power loss is
minimized while the load current is supplied by the output
capacitor. Whenever the output voltage drops below a
predetermined value, the buck wakes from sleep and cycles
the switches again until the output capacitor voltage is once
again slightly above the regulation point. Sleep time thus
depends on load current, since the load current determines
the discharge rate of the output capacitor.
Standby Mode (STBY Pin High)
There are situations where even the low quiescent current
of Burst Mode operation is not low enough. For instance,
in a static memory keep alive situation, load current may
fall well below 1μA. In this case, the 25μA typical BVIN
quiescent current per active regulator in Burst Mode
operation becomes the main factor determining battery
run time.
Standby mode cuts BVIN quiescent current down to just
1.5μA per active regulator, greatly extending battery run
time in this essentially no-load region of operation. The
application circuit commands the LTC3554 into and out
of standby mode via the STBY pin logic input. Bringing
the STBY pin high places both regulators into standby
mode, while bringing it low returns them to Burst Mode
operation. In standby mode, load capability drops to 5mA
per regulator.
OPERATION
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