LTC3542
11
3542fa
3) The switching current is MOSFET gate charging current,
that results from switching the gate capacitance of the
power MOSFETs. Each time a MOSFET gate is switched
from low to high to low again, a packet of charge dQ moves
from VIN to ground. The resulting dQ/dt is a current out of
VIN that is typically much larger than the DC bias current.
In continuous mode, IGATECHG = fO(QT + QB), where QT
and QB are the gate charges of the internal top and bottom
MOSFET switches. The gate charge losses are proportional
to VIN and thus their effects will be more pronounced at
higher supply voltages.
Other “hidden” losses such as copper trace and internal
battery resistances can account for additional efciency
degradations in portable systems. The internal battery
and fuse resistance losses can be minimized by making
sure that CIN has adequate charge storage and very low
ESR at the switching frequency. Other losses include
diode conduction losses during dead-time and inductor
core losses generally account for less than 2% total ad-
ditional loss.
Thermal Considerations
In most applications the LTC3542 does not dissipate much
heat due to its high efciency. But in applications where the
LTC3542 is running at high ambient temperature with low
supply voltage and high duty cycles, such as in dropout,
the heat dissipated may exceed the maximum junction
temperature of the part. If the junction temperature reaches
approximately 60°C, both power switches will be turned
off and the SW node will become high impedance.
To avoid the LTC3542 from exceeding the maximum
junction temperature, the user need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and
θJA is the thermal resistance from the junction of the die
to the ambient.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3542 in dropout at an
input voltage of 2.7V, a load current of 500mA and an
ambient temperature of 70°C. From the typical performance
graph of switch resistance, the RDS(ON) of the P-channel
switch at 70°C is approximately 0.7
Ω. Therefore, power
dissipated by the part is:
PD = ILOAD2 RDS(ON) = 175mW
For the DFN package, the
θJA is 102°C/W. Thus, the junc-
tion temperature of the regulator is:
TJ = 70°C + 0.175 102 = 87.9°C
which is below the maximum junction temperature of
125°C.
Notethatathighersupplyvoltages,thejunctiontemperature
is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to
ΔILOAD ESR, where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or dis-
charge COUT, generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problem.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a re-
view of control loop theory, refer to Application Note 76.
In some applications, a more severe transient can be caused
by switching loads with large (>1μF) bypass capacitors.
The discharged bypass capacitors are effectively put in
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