參數(shù)資料
型號(hào): LTC3413EFE
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination
中文描述: 7.2 A SWITCHING REGULATOR, 2000 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 4.40 MM, PLASTIC, TSSOP-16
文件頁(yè)數(shù): 9/16頁(yè)
文件大小: 243K
代理商: LTC3413EFE
9
LTC3413
sn3413 3413fs
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Output Voltage Programming
In most applications, V
OUT
is connected directly to V
FB
.
The output voltage will be equal to one-half of the voltage
on the V
REF
pin for this case.
V
V
OUT
REF
2
=
If a different output voltage relationship is desired, an
external resistor divider from V
OUT
to V
FB
can be used. The
output voltage will then be set according to the following
equation:
pulled above 2V. The full current range becomes available
on I
TH
after 1024 switching cycles. If a longer soft-start
period is desired, the clamp on I
TH
can be set externally
with a resistor and capacitor on the RUN/SS pin as shown
in Figure 1a. The soft-start duration can be calculated by
using the following formula:
t
R
V
V
SS
SS
IN
=
C
ln
V
– .8
(Seconds)
SS
IN
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% - (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: V
IN
quiescent current and I
2
R losses.
The V
IN
quiescent current loss dominates the efficiency
loss at very low load currents whereas the I
2
R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence.
1. The V
IN
quiescent current is due to two components:
the DC bias current as given in the Electrical Characteris-
tics and the internal main switch and synchronous switch
gate charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
APPLICATIOU
W
U
U
R2
V
OUT
R1
3413 F02
V
FB
SGND
LTC3413
Figure 2. Setting the Output Voltage
V
V
R
R
OUT
REF
2
=
+
1
2
1
Soft-Start
The RUN/SS pin provides a means to shut down the
LTC3413 as well as a timer for soft-start. Pulling the
RUN/SS pin below 0.5V places the LTC3413 in a low
quiescent current shutdown state (I
Q
< 1
μ
A).
The LTC3413 contains an internal soft-start clamp that
gradually raises the clamp on I
TH
after the RUN/SS pin is
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LTC3413EFE-PBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination