參數(shù)資料
型號(hào): LTC3409
廠商: Linear Technology Corporation
元件分類: DRAM
英文描述: 64 x 18 3.3-V asynchronous FIFO memory 56-SSOP 0 to 70
中文描述: 600mA的低輸入電壓降壓穩(wěn)壓器x 3mm DFN封裝采用3mm
文件頁(yè)數(shù): 15/16頁(yè)
文件大?。?/td> 246K
代理商: LTC3409
15
LTC3409
3409f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
DD Package
8-Lead Plastic DFN (3mm
×
3mm)
(Reference LTC DWG # 05-08-1698)
3.00
±
0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.38
±
0.10
BOTTOM VIEW—EXPOSED PAD
1.65
±
0.10
(2 SIDES)
0.75
±
0.05
R = 0.115
TYP
5
2.38
±
0.10
(2 SIDES)
1
4
8
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD8) DFN 1203
0.25
±
0.05
2.38
±
0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65
±
0.05
(2 SIDES)
2.15
±
0.05
0.50
BSC
0.675
±
0.05
3.5
±
0.05
PACKAGE
OUTLINE
0.25
±
0.05
0.50 BSC
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