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參數(shù)資料
| 型號： | LTC3104IMSE#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 339K |
| 描述： | IC REG DL BCK/LINEAR SYNC 16MSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 拓?fù)洌?/td> | 降壓（降壓）同步（1），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開關(guān)： | 1.2MHz |
| 電壓/電流 - 輸出 1： | 0.6 V ~ 13.8 V，300mA |
| 電壓/電流 - 輸出 2： | 0.6 V ~ 14.5 V，10mA |
| 帶 LED 驅(qū)動器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 無 |
| 電源電壓： | 2.5 V ~ 15 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TFSOP（0.118"，3.00mm 寬）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-MSOP，裸露焊盤 |
| 包裝： | 帶卷 (TR) |
LTC3104
11
3104f
OPERATION
Slope Compensation
Current mode control requires the use of slope com-
pensation to prevent sub-harmonic oscillations in the
inductor current waveform at high duty cycle operation. In
some current mode ICs, current limiting is performed by
clamping the error amplifier voltage to a fixed maximum
which leads to a reduced output current capability at low
step-down ratios. Slope compensation is accomplished
on the LTC3104 internally through the addition of a com-
pensating ramp to the current sense signal. The current
limiting function is completed prior to the addition of the
compensation ramp and therefore achieves a peak inductor
current limit that is independent of duty cycle.
Short-Circuit Protection
When the output is shorted to ground, the error amplifier
will saturate high and the high side switch will turn on at
the start of each cycle and remain on until the current limit
trips. During this minimum on-time, the inductor current
will increase rapidly and will decrease very slowly during
the remainder of the period due to the very small reverse
voltage produced by a hard output short. To eliminate the
possibility of inductor current runaway in this situation, the
switching frequency is reduced to approximately 300kHz
when the voltage on FB falls below 0.3V.
BST Pin Function
The input switch driver operates from the voltage gener-
ated on the BST pin. An external capacitor between the SW
and BST pins and an internal synchronous PMOS boost
switch are used to generate a voltage that is higher than
the input voltage. When the synchronous rectifier is on
(SW is low) the internal boost switch connects one side
of the capacitor to V
CC
replenishing its charge. When the
synchronous rectifier is turned off the input switch is turned
on forcing SW high and the BST pin is at a potential equal
to V
CC
+ SW, relative to ground.
A comparator ensures there is sufficient voltage across
the boost capacitor to guarantee start-up after long sleep
periods or if starting up into a pre-biased output.
Undervoltage Lockout
The LTC3104 has an internal UVLO which disables the
converter if the supply voltage decreases below 2.1V (typi-
cal). The soft-start for the converter will be reset during
undervoltage lockout to provide a smooth restart once the
input voltage increases above the undervoltage lockout
threshold. The RUN pin can alternatively be configured as
a precise undervoltage lockout (UVLO) on the V
IN
supply
with a resistive divider connected to the RUN pin.
V
LDO
OUTPUT
The V
LDO
output utilizes an internal PMOS pass device
that is guaranteed to support a 10mA load with a typi-
cal dropout voltage of 150mV. The LDO is powered by
the V
INLDO
input which can be tied to an independent
power source or to the V
OUT
of the step-down converter.
V
INLDO
can be tied to V
IN
only if V
IN
is guaranteed to be
within the absolute maximum ratings of the V
INLDO
pin.
The quiescent current will increase by about 0.3礎(chǔ) when
V
INLDO
is tied to V
IN
. The V
LDO
output is only active when
V
IN
is greater than the UVLO threshold and the RUNLDO
pin is high but can be disabled independently by bringing
RUNLDO below 0.5V.
The LDO is specifically designed to be stable with a small
4.7礔 capacitor, but to also maintain stable operation with
arbitrarily large capacitance values without requiring a
series resistor. The LDO output is current-limit protected
to 20mA (typ). During an undervoltage or overtemperature
fault, the LDO is disabled until the fault condition clears.
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