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參數(shù)資料
| 型號： | LTC2607CDE |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | DAC |
| 英文描述： | 16-/14-/12-Bit Dual Rail-to-Rail DACs with I2C Interface |
| 中文描述： | SERIAL INPUT LOADING, 10 us SETTLING TIME, 16-BIT DAC, PDSO12 |
| 封裝： | 4 X 3 MM, EXPOSED PAD, PLASTIC, MO-229WGED, DFN-12 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 318K |
| 代理商： | LTC2607CDE |
4
LTC2607/LTC2617/LTC2627
26071727f
TIW
range, otherwise specifications are at T
A
= 25
°
C. (See Figure 1) (Notes 10, 11)
SYMBOL
PARAMETER
V
CC
= 2.7V to 5.5V
f
SCL
SCL Clock Frequency
t
HD(STA)
Hold Time (Repeated) Start Condition
t
LOW
Low Period of the SCL Clock Pin
t
HIGH
High Period of the SCL Clock Pin
t
SU(STA)
Set-Up Time for a Repeated Start Condition
t
HD(DAT)
Data Hold Time
t
SU(DAT)
Data Set-Up Time
t
r
Rise Time of Both SDA and SCL Signals
t
f
Fall Time of Both SDA and SCL Signals
t
SU(STO)
Set-Up Time for Stop Condition
t
BUF
Bus Free Time Between a Stop and Start Condition
t
1
Falling Edge of 9th Clock of the 3rd Input Byte
to LDAC High or Low Transition
t
2
LDAC Low Pulse Width
The
●
denotes specifications which apply over the full operating temperature
ELECTRICAL C
temperature range, otherwise specifications are at T
A
= 25
°
C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V,
V
OUT
unloaded, unless otherwise noted.
HARA TERISTICS
The
●
denotes specifications which apply over the full operating
Note 1:
Absolute maximum ratings are those values beyond which the life of
a device may be impaired.
Note 2:
Linearity and monotonicity are defined from code k
L
to code
2
N
– 1, where N is the resolution and k
L
is given by k
L
= 0.016(2
N
/V
REF
),
rounded to the nearest whole code. For V
REF
= 4.096V and N = 16, k
L
= 256
and linearity is defined from code 256 to code 65,535.
Note 3:
SDA, SCL and LDAC at 0V or V
CC
, CA0, CA1 and CA2 Floating.
Note 4:
DC crosstalk is measured with V
CC
= 5V and V
REF
= 4.096V, with the
measured DAC at midscale, unless otherwise noted.
Note 5:
R
L
= 2k
to GND or V
CC
.
Note 6:
Inferred from measurement at code k
L
(Note 2) and at full scale.
Note 7:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped 1/4 scale to 3/4 scale and
3/4 scale to 1/4 scale. Load is 2k in parallel with 200pF to GND.
Note 8:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped
±
1LSB between half scale
and half scale – 1. Load is 2k in parallel with 200pF to GND.
Note 9:
C
B
= capacitance of one bus line in pF.
Note 10:
All values refer to V
IH(MIN)
and V
IL(MAX)
levels.
Note 11:
These specifications apply to LTC2607/LTC2607-1,
LTC2617/LTC2617-1, LTC2627/LTC2627-1.
Note 12:
Guaranteed by design and not production tested.
LTC2627/LTC2627-1 LTC2617/LTC2617-1 LTC2607/LTC2607-1
MIN
TYP
MAX
MIN
TYP
SYMBOL
AC Performance
t
S
PARAMETER
CONDITIONS
MAX
MIN
TYP
MAX
UNITS
Settling Time (Note 7)
±
0.024% (
±
1LSB at 12 Bits)
±
0.006% (
±
1LSB at 14 Bits)
±
0.0015% (
±
1LSB at 16 Bits)
±
0.024% (
±
1LSB at 12 Bits)
±
0.006% (
±
1LSB at 14 Bits)
±
0.0015% (
±
1LSB at 16 Bits)
7
7
9
7
9
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
10
2.7
4.
8
5.2
0.
8
1000
12
1
8
0
120
100
15
Settling Time for 1LSB Step
(Note
8
)
2.7
2.7
4.
8
Voltage Output Slew Rate
Capacitive Load Driving
Glitch Impulse
Multiplying Bandwidth
Output Voltage Noise Density
0.
8
1000
12
1
8
0
120
100
15
0.
8
1000
12
1
8
0
120
100
15
V/
μ
s
pF
nV s
kHz
nV/
√
Hz
nV/
√
Hz
μ
V
P-P
At Midscale Transition
e
n
At f = 1kHz
At f = 10kHz
0.1Hz to 10Hz
Output Voltage Noise
CONDITIONS
MIN
TYP
MAX
UNITS
●
0
400
kHz
μ
s
μ
s
μ
s
μ
s
μ
s
ns
ns
ns
μ
s
μ
s
ns
●
0.6
1.3
0.6
0.6
0
100
●
●
●
●
0.9
●
(Note 9)
(Note 9)
●
20 + 0.1C
B
20 + 0.1C
B
0.6
1.3
400
300
300
●
●
●
●
●
20
ns
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