參數(shù)資料
型號(hào)： LTC2495CUHF#TR
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 16-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC38
封裝： 5 X 7 MM, PLASTIC, MO-220WKHD, QFN-38
文件頁(yè)數(shù)： 14/32頁(yè)
文件大小： 619K
代理商： LTC2495CUHF#TR
LTC2495
2495fa
Figure 6. Conversion Sequence
Figure 7. Consecutive Reading with the Same Input/Configuration
Table 6. Address Assignment
CA2
CA1
CA0
ADDRESS
LOW
0010100
LOW
HIGH
0010110
LOW
FLOAT
0010101
LOW
HIGH
LOW
0100110
LOW
HIGH
0110100
LOW
HIGH
FLOAT
0100111
LOW
FLOAT
LOW
0010111
LOW
FLOAT
HIGH
0100101
LOW
FLOAT
0100100
HIGH
LOW
1010110
HIGH
LOW
HIGH
1100100
HIGH
LOW
FLOAT
1010111
HIGH
LOW
1110100
HIGH
1110110
HIGH
FLOAT
1110101
HIGH
FLOAT
LOW
1100101
HIGH
FLOAT
HIGH
1100111
HIGH
FLOAT
1100110
FLOAT
LOW
0110101
FLOAT
LOW
HIGH
0110111
FLOAT
LOW
FLOAT
0110110
FLOAT
HIGH
LOW
1000111
FLOAT
HIGH
1010101
FLOAT
HIGH
FLOAT
1010100
FLOAT
LOW
1000100
FLOAT
HIGH
1000110
FLOAT
1000101
applicaTions inFormaTion
unchanged from the last value written into the device. If
the device has not been written to since power up, the
configuration is set to the default value. At the end of a
read operation, a new conversion automatically begins.
At the conclusion of the conversion cycle, the next result
may be read using the method described above. If the
conversion cycle is not concluded and a valid address
selects the device, the LTC2495 generates a NAk signal
indicating the conversion cycle is in progress.
Continuous Read/Write
Once the conversion cycle is concluded, the LTC2495 can
be written to and then read from using the Repeated Start
(Sr) command.
Figure 8 shows a cycle which begins with a data Write, a
repeated Start, followed by a Read and concluded with a
Stop command. The following conversion begins after all
24 bits are read out of the device or after a Stop command.
Thefollowingconversionwillbeperformedusingthenewly
programmed data. In cases where the same speed (1x/2x
mode), rejection frequency (50Hz, 60Hz, 50Hz and 60Hz)
and gain is used but the channel is changed, a Stop or
Repeated Start may be issued after the first byte (channel
selection data) is written into the device.
Discarding a Conversion Result and Initiating a New
Conversion with Optional Write
At the conclusion of a conversion cycle, a write cycle
can be initiated. Once the write cycle is acknowledged, a
Stop command will start a new conversion. If a new input
S
ACK
DATA
Sr
DATA TRANSFERRING
P
SLEEP
DATA INPUT/OUTPUT
CONVERSION
7-BIT ADDRESS
R/W
2495 F05
7-BIT ADDRESS
CONVERSION
SLEEP
DATA OUTPUT
7-BIT ADDRESS
S
R
ACK
READ
P
2495 F07
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