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參數(shù)資料
| 型號： | LTC2492IDE#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 4-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO14 |
| 封裝： | 4 X 3 MM, PLASTIC, MO-229WGED-3, QFN-14 |
| 文件頁數(shù)： | 21/36頁 |
| 文件大?。?/td> | 652K |
| 代理商： | LTC2492IDE#TR |
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LTC2492
2492fa
applicaTions inFormaTion
conversion cycle, the average differential input current
(IIN+ – IIN–) is zero. While the differential input current is
zero, the common mode input current (IIN+ + IIN–)/2 is
proportional to the difference between the common mode
input voltage (VIN(CM)) and the common mode reference
voltage (VREF(CM)).
In applications where the input common mode voltage is
equal to the reference common mode voltage, as in the
case of a balanced bridge, both the differential and com-
mon mode input currents are zero. The accuracy of the
converter is not compromised by settling errors.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between VIN(CM) and VREF(CM). For a reference
commonmodevoltageof2.5Vandaninputcommonmode
of 1.5V, the common mode input current is approximately
0.74A.Thiscommonmodeinputcurrentdoesnotdegrade
the accuracy if the source impedances tied to IN+ and
IN– are matched. Mismatches in source impedance lead
to a fixed offset error but do not effect the linearity or full
scale reading. A 1% mismatch in a 1k source resistance
leads to a 74V shift in offset voltage.
In applications where the common mode input voltage
varies as a function of the input signal level (single ended
type sensors), the common mode input current varies pro-
portionallywithinputvoltage.Forthecaseofbalancedinput
impedances, the common mode input current effects are
rejected by the large CMRR of the LTC2492, leading to little
degradationinaccuracy.Mismatchesinsourceimpedances
lead to gain errors proportional to the difference between
thecommonmodeinputandcommonmodereference.1%
mismatches in 1k source resistances lead to gain errors on
the order of 15ppm. Based on the stability of the internal
sampling capacitors and the accuracy of the internal oscil-
lator, a one-time calibration will remove this error.
In addition to the input sampling current, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (±10nA Max), results
in a small offset shift. A 1k source resistance will create a
1V typical and a 10V maximum offset voltage.
Reference Current
Similar to the analog inputs, the LTC2492 samples the
differential reference pins (REF+ and REF–) transferring
small amounts of charge to and from these pins, thus
producing a dynamic reference current. If incomplete set-
tling occurs (as a function the reference source resistance
andreferencebypasscapacitance)linearityandgainerrors
are introduced.
Forrelativelysmallvaluesofexternalreferencecapacitance
(CREF < 1nF), the voltage on the sampling capacitor settles
for reference impedances of many k
Ω (if CREF = 100pF up
to 10k
Ω will not degrade the performance) (see Figures
13 and 14).
Figure 13. +FS Error vs RSOURCE at VREF (Small CREF)
Figure 14. –FS Error vs RSOURCE at VREF (Small CREF)
RSOURCE ()
0
+FS
ERROR
(ppm)
50
70
90
10k
2492 F13
30
10
40
60
80
20
0
–10
10
100
1k
100k
VCC = 5V
VREF = 5V
VIN+ = 3.75V
VIN– = 1.25V
FO = GND
TA = 25°C
CREF = 0.01F
CREF = 0.001F
CREF = 100pF
CREF = 0pF
RSOURCE ()
0
–FS
ERROR
(ppm) –30
–10
10
10k
2492 F14
–50
–70
–40
–20
0
–60
–80
–90
10
100
1k
100k
VCC = 5V
VREF = 5V
VIN+ = 1.25V
VIN– = 3.75V
FO = GND
TA = 25°C
CREF = 0.01F
CREF = 0.001F
CREF = 100pF
CREF = 0pF
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