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參數(shù)資料
| 型號(hào)： | LTC2486CDE |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 16-Bit 2-/4-Channel ツヒ ADC with PGA and Easy Drive Input Current Cancellation |
| 中文描述： | 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14 |
| 封裝： | 4 X 3 MM, PLASTIC, MO-229WGED-3, QFN-14 |
| 文件頁(yè)數(shù)： | 30/36頁(yè) |
| 文件大?。?/td> | 596K |
| 代理商： | LTC2486CDE |
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LTC2486
30
2486f
APPLICATIONS INFORMATION
A 1V difference in between common mode input and com-
mon mode reference results in a 6.7ppm INL error for every
100
Ω
of reference resistance.
In addition to the reference sampling charge, the reference
ESD protection diodes have a temperature dependent leak-
age current. This leakage current, nominally 1nA (±10nA
max) results in a small gain error. A 100
Ω
reference
resistance will create a 0.5μV full scale error.
Normal Mode Rejection and Anti-aliasing
One of the advantages delta-sigma ADCs offer over
conventional ADCs is on-chip digital filtering. Combined
with a large oversample ratio, the LTC2486 significantly
simplifies anti-aliasing filter requirements. Additionally,
the input current cancellation feature allows external low
pass filtering without degrading the DC performance of
the device.
The SINC
4
digital filter provides excellent normal mode
rejection at all frequencies except DC and integer multiples
of the modulator sampling frequency (f
S
) (see Figures
18 and 19). The modulator sampling frequency is f
S
=
15,360Hz while operating with its internal oscillator and
f
S
= F
EOSC
/20 when operating with an external oscillator
of frequency F
EOSC
.
When using the internal oscillator, the LTC2486 is designed
to reject line frequencies. As shown in Figure 20, rejec-
tion nulls occur at multiples of frequency f
N
, where f
N
is
determined by the input control bits FA and FB (f
N
= 50Hz
or 60Hz or 55Hz for simultaneous rejection). Multiples of
the modulator sampling rate (f
S
= f
N
256) only reject noise
to 15dB (see Figure 21); if noise sources are present at
these frequencies anti-aliasing will reduce their effects.
Figure 18. Input Normal Mode Rejection, Internal Oscillator
and 50Hz Rejection Mode
Figure 19. Input Normal Mode Rejection, Internal Oscillator
and 60Hz Rejection Mode
Figure 20. Input Normal Mode Rejection at DC
Figure 21. Input Normal Mode Rejection at f
S
= 256 f
N
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
f
S
2f
S
3f
S
4f
S
5f
S
6f
S
7f
S
8f
S
9f
S
10f
S
11f
S
12f
S
I
2486 F18
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
f
S
I
2486 F19
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
2f
S
3f
S
4f
S
5f
S
6f
S
7f
S
8f
S
9f
S
10f
S
INPUT SIGNAL FREQUENCY (Hz)
I
2486 F20
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
f
N
0
2f
N
3f
N
4f
N
5f
N
6f
N
7f
N
8f
N
f
N
= f
EOSC/5120
INPUT SIGNAL FREQUENCY (Hz)
250f
N
252f
N
254f
N
256f
N
258f
N
260f
N
262f
N
I
2486 F21
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
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