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參數(shù)資料
| 型號： | LTC2486CDE |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 16-Bit 2-/4-Channel ツヒ ADC with PGA and Easy Drive Input Current Cancellation |
| 中文描述： | 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14 |
| 封裝： | 4 X 3 MM, PLASTIC, MO-229WGED-3, QFN-14 |
| 文件頁數(shù)： | 27/36頁 |
| 文件大?。?/td> | 596K |
| 代理商： | LTC2486CDE |
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LTC2486
27
2486f
Digital Signal Levels
The LTC2486’s digital interface is easy to use. Its digital
inputs SDI, F
O
,
C
S, and SCK (in external serial clock mode)
accept standard CMOS logic levels. Internal hysteresis
circuits can tolerate edge transition times as slow as
100μs.
The digital input signal range is 0.5V to V
CC
– 0.5V. During
transitions, the CMOS input circuits draw dynamic cur-
rent. For optimal performance, application of signals to
the serial data interface should be reserved for the sleep
and data output periods.
During the conversion period, overshoot and undershoot
of fast digital signals applied to both the serial digital in-
terface and the external oscillator pin (F
O
) may degrade
the converter performance. Undershoot and overshoot
occur due to impedance mismatch of the circuit board
trace at the converter pin when the transition time of an
external control signal is less than twice the propagation
delay from the driver to the input pin. For reference, on a
regular FR-4 board, the propagation delay is approximately
183ps/inch. In order to prevent overshoot, a driver with
a 1ns transition time must be connected to the converter
through a trace shorter than 2.5 inches. This becomes
difficult when shared control lines are used and multiple
reflections occur.
APPLICATIONS INFORMATION
Parallel termination near the input pin of the LTC2486 will
eliminate this problem, but will increase the driver power
dissipation. A series resistor from 27
Ω
to 54
Ω
(depend-
ing on the trace impedance and connection) placed near
the driver will also eliminate over/under shoot without
additional driver power dissipation.
For many applications, the serial interface pins (SCK, SDI,
C
S, F
O
) remain static during the conversion cycle and
no degradation occurs. On the other hand, if an external
oscillator is used (F
O
driven externally) it is active during
the conversion cycle. Moreover, the digital filter rejection
is minimal at the clock rate applied to F
O
. Care must be
taken to ensure external inputs and reference lines do not
cross this signal or run near it. These issues are avoided
when using the internal oscillator.
Driving the Input and Reference
The input and reference pins of the LTC2486 are connected
directly to a switched capacitor network. Depending on
the relationship between the differential input voltage and
the differential reference voltage, these capacitors are
switched between these four pins. Each time a capacitor
is switched between two of these pins, a small amount
of charge is transferred. A simplified equivalent circuit is
shown in Figure 12.
Figure 12. LTC2486 Equivalent Analog Input Circuit
IN+
IN
–
10k
INTERNAL
SWITCH
NETWORK
10k
C
12pF
10k
I
IN–
REF
+
I
REF+
I
IN+
I
REF–
2486 F12
SWITCHING FREQUENCY
f
SW
= 123kHz INTERNAL OSCILLATOR
f
SW
= 0.4 f
EOSC
EXTERNAL OSCILLATOR
REF
–
10k
100
INPUT
MULTIPLEXER
100
I IN
I IN
V
V
R
AVG
)
:
AVG
IN CM
(
REF CM
(
EQ
V
+
)
=
)
=
–
)
)
.5
I REF
where
V
V
R
AVG
REF
REF CM
0 5
.
IN CM
(
+
≈
+
(
)
1 5
.
–
(
)
)
EQ
IN
REF
V
EQ
REF
V
REF CM
V
V
R
REF
REF
–
(
2
=
+
)
–
2
,
=
=
+
+
REF
REF
V
IN
IN
WHEREIN AN
2
IN
DIN ARE THE SELECTEDINPUT CHANNELS
V
IN
IN CM
(
+
=
)
–
.
IN
R
R
M INTERNAL OSCILLATOR
2 71
2.98M INTERNAL OSCILLATOR50Hz/60
(
EQ
EQ
=
R
EQ
=
6
0HzMODE
Hz MODE
0.833 10
/f
EXTERNAL OSCIL
12
EOSC
=
)
LATOR
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