參數(shù)資料
型號: LTC2486CDE#PBF
廠商: Linear Technology
文件頁數(shù): 6/36頁
文件大小: 0K
描述: IC ADC 16BIT W/PGA 14-DFN
標準包裝: 91
位數(shù): 16
采樣率(每秒): 15
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 800µW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應商設(shè)備封裝: 14-DFN-EP(4x3)
包裝: 管件
輸入數(shù)目和類型: 4 個單端,雙極;2 個差分,雙極
產(chǎn)品目錄頁面: 1348 (CN2011-ZH PDF)
配用: DC1009A-C-ND - BOARD DELTA SIGMA ADC LTC2486
LTC2486
14
2486fd
APPLICATIONS INFORMATION
Easy Drive Input Current Cancellation
The LTC2486 combines a high precision, delta-sigma ADC
with an automatic, differential, input current cancellation
front end. A proprietary front end passive sampling network
transparently removes the differential input current. This
enables external RC networks and high impedance sen-
sors to directly interface to the LTC2486 without external
ampliers. The remaining common mode input current
is eliminated by either balancing the differential input
impedances or setting the common mode input equal to
the common mode reference (see Automatic Differential
Input Current Cancellation section). This unique architec-
ture does not require on-chip buffers, thereby enabling
signals to swing beyond ground and VCC. Moreover, the
cancellation does not interfere with the transparent offset
and full-scale auto-calibration and the absolute accuracy
(full scale + offset + linearity + drift) is maintained even
with external RC networks.
Power-Up Sequence
The LTC2486 automatically enters an internal reset state
when the power supply voltage, VCC, drops below ap-
proximately 2V. This feature guarantees the integrity of
the conversion result, input channel selection, and serial
clock mode.
When VCC rises above this threshold, the converter creates
an internal power-on-reset (POR) signal with a duration
of approximately 4ms. The POR signal clears all internal
registers. The conversion immediately following a POR
cycle is performed on the input channel IN+ = CH0 and
IN= CH1 with simultaneous 50Hz/60Hz rejection, 1x
output rate, and gain = 1. The rst conversion following a
POR cycle is accurate within the specication of the device
if the power supply voltage is restored to (2.7V to 5.5V)
before the end of the POR interval. A new input channel,
rejection mode, speed mode, temperature selection or
gain can be programmed into the device during this rst
data input/output cycle.
Reference Voltage Range
This converter accepts a truly differential external reference
voltage. The absolute/common mode voltage range for the
REF+ and REFpins covers the entire operating range of
the device (GND to VCC). For correct converter operation,
VREF must be positive (REF+ > REF).
The LTC2486 differential reference input range is 0.1V to
VCC. For the simplest operation, REF+ can be shorted to
VCC and REFcan be shorted to GND. The converter out-
put noise is determined by the thermal noise of the front
end circuits, and as such, its value in nanovolts is nearly
constant with reference voltage. A decrease in reference
voltage will not signicantly improve the converter’s effec-
tive resolution. On the other hand, a decreased reference
will improve the converter’s overall INL performance.
Input Voltage Range
The analog inputs are truly differential with an absolute,
common mode range for the CH0 to CH3 and COM input
pins extending from GND – 0.3V to VCC + 0.3V. Outside
these limits, the ESD protection devices begin to turn
on and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2486 converts the
bipolar differential input signal VIN = IN+ – IN(where
IN+ and INare the selected input channels), from –FS =
–0.5 VREF/Gain to +FS = 0.5 VREF/Gain where VREF =
REF+ – REF. Outside this range, the converter indicates
the overrange or the underrange condition using distinct
output codes (see Table 1).
Signals applied to the input (CH0 to CH3, COM) may
extend 300mV below ground and above VCC. In order to
limit any fault current, resistors of up to 5k may be added
in series with the input. The effect of series resistance on
the converter accuracy can be evaluated from the curves
presented in the Input Current/Reference Current sections.
In addition, series resistors will introduce a temperature
dependent error due to input leakage current. A 1nA
input leakage current will develop a 1ppm offset error
on a 5k resistor if VREF = 5V. This error has a very strong
temperature dependency.
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