參數(shù)資料
型號(hào)： LTC2482CDD#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 6/32頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT 10-DFN
標(biāo)準(zhǔn)包裝： 121
位數(shù)： 16
采樣率（每秒）： 6.8
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 480µW
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 10-WFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 10-DFN（3x3）
包裝： 管件
輸入數(shù)目和類(lèi)型： 1 個(gè)差分，雙極
產(chǎn)品目錄頁(yè)面： 1348 (CN2011-ZH PDF)
配用： DC941A-ND - BOARD DELTA SIGMA ADC LTC2482
LTC2482
14
2482fc
APPLICATIONS INFORMATION
Ease of Use
The LTC2482 data output has no latency, lter settling
delay or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog voltages is easy.
The LTC2482 performs offset and full-scale calibrations
every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation described
above. The advantage of continuous calibration is extreme
stability of offset and full-scale readings with respect to
time, supply voltage change and temperature drift.
Power-Up Sequence
The LTC2482 automatically enters an internal reset
state when the power supply voltage VCC drops below
approximately 2V. This feature guarantees the integrity
of the conversion result and of the serial interface mode
selection. (See the 2-wire I/O sections in the Serial Interface
Timing Modes section.)
When the VCC voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a duration of approximately 4ms. The POR
signal clears all internal registers. Following the POR signal,
the LTC2482 starts a normal conversion cycle and follows
the succession of states described in Figure 1. The rst
conversion result following POR is accurate within the
specications of the device if the power supply voltage is
restored within the operating range (2.7V to 5.5V) before
the end of the POR time interval.
Reference Voltage Range
The LTC2482 external reference voltage range is 0.1V
to VCC. The converter output noise is determined by the
thermal noise of the front-end circuits, and as such, its
value in nanovolts is nearly constant with reference voltage.
Since the transition noise (600nV) is much less than the
quantization noise (VREF/217), a decrease in the reference
voltage will increase the converter resolution. A reduced
reference voltage will improve the converter performance
when operated with an external conversion clock (external
fO signal) at substantially higher output data rates (see the
Output Data Rate section).
The negative reference input to the converter is internally
tied to GND. GND (Pin 8) should be connected to a ground
plane through as short a trace as possible to minimize volt-
age drop. The LTC2482 has an average operational current
of 160μA and for 1Ω parasitic resistance, the voltage drop
of 160μV causes a gain error of 2LSB for VREF = 5V.
Input Voltage Range
The analog input is truly differential with an absolute/com-
mon mode range for the IN+ and IN– input pins extending
from GND – 0.3V to VCC + 0.3V. Outside these limits, the
ESD protection devices begin to turn on and the errors
due to input leakage current increase rapidly. Within these
limits, the LTC2482 converts bipolar differential input signal,
VIN = IN+ – IN–, from –FS to +FS where FS = 0.5 VREF.
Outside this range, the converter indicates the overrange
or the underrange condition using distinct output codes.
Since the differential input current cancellation does not
rely on an on-chip buffer, current cancellation as well as
DC performance is maintained rail-to-rail.
Input signals applied to IN+ and IN– pins may extend by
300mV below ground and above VCC. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN+ and IN– pins without affecting the performance
of the devices. The effect of the series resistance on the
converter accuracy can be evaluated from the curves
presented in the Input Current/Reference Current sections.
In addition, series resistors will introduce a temperature
dependent offset error due to the input leakage current.
A 1nA input leakage current will develop a 1ppm offset
error on a 5k resistor if VREF = 5V. This error has a very
strong temperature dependency.
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