參數(shù)資料
型號: LTC2480IDD#TRPBF
廠商: Linear Technology
文件頁數(shù): 4/42頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 10-DFN
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 7.5
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-DFN(3x3)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)單端,雙極;1 個(gè)差分,雙極
配用: DC798B-ND - BOARD DELTA SIGMA ADC LTC2480
LTC2480
2480fd
pin FuncTions
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the data output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 7): Three-State Digital Output. During the data
output period, this pin is used as the serial data output.
When the chip select CS is HIGH (CS = VCC), the SDO pin
is in a high impedance state. During the conversion and
sleep periods, this pin is used as the conversion status
output. The conversion status can be observed by pulling
CS LOW.
GND(Pin8):Ground.Sharedpinforanalogground,digital
groundandreferenceground.Shouldbeconnecteddirectly
to a ground plane through a minimum impedance.
SCK (Pin 9): Bidirectional Digital Clock Pin. In internal
serial clock operation mode, SCK is used as the digital
output for the internal serial interface clock during the
data input/output period. In external serial clock operation
mode, SCK is used as the digital input for the external se-
rial interface clock during the data output period. A weak
internal pull-up is automatically activated in internal serial
clock operation mode. The serial clock operation mode
is determined by the logic level applied to the SCK pin at
power up or during the most recent falling edge of CS.
fO (Pin 10): Frequency Control Pin. Digital input that
controls the conversion clock. When fO is connected to
GND the converter uses its internal oscillator running at
307.2kHz.Theconversionclockmayalsobeoverriddenby
driving the fO pin with an external clock in order to change
the output rate or the digital filter rejection null.
GND (Exposed Pad Pin 11): This pin is ground and should
be soldered to the PCB ground plane. For prototyping
purposes, this pin may remain floating.
FuncTional block DiagraM
1
9
4
5
7
6
10
3RD ORDER
ADC
REF+
IN+
3
VREF
IN
REF
(1-256)
GAIN
SERIAL
INTERFACE
TEMP
SENSOR
MUX
SDI
2
VCC
8
GND
CS
FO
2480 FD
SCK
SD0
AUTOCALIBRATION
AND CONTROL
INTERNAL
OSCILLATOR
TesT circuiTs
1.69k
SDO
2480 TA02
Hi-Z TO VOH
VOL TO VOH
VOH TO Hi-Z
CLOAD = 20pF
1.69k
SDO
2480 TA03
Hi-Z TO VOL
VOH TO VOL
VOL TO Hi-Z
CLOAD = 20pF
VCC
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