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參數(shù)資料
| 型號： | LTC2480IDD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 21/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 10-DFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 7.5 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 10-DFN（3x3） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個(gè)單端，雙極；1 個(gè)差分，雙極 |
| 配用： | DC798B-ND - BOARD DELTA SIGMA ADC LTC2480 |
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LTC2480
2480fd
Driving the Input and Reference
The input and reference pins of the LTC2480 converter
are directly connected to a network of sampling capaci-
tors. Depending upon the relation between the differential
input voltage and the differential reference voltage, these
capacitors are switching between these four pins transfer-
ring small amounts of charge in the process. A simplified
equivalent circuit is shown in Figure 11.
For a simple approximation, the source impedance RS
driving an analog input pin (IN+, IN–, VREF+ or GND) can
be considered to form, together with RSW and CEQ (see
Figure 11), a first order passive network with a time
constant
τ = (RS + RSW) CEQ. The converter is able to
sample the input signal with better than 1ppm accuracy
if the sampling period is at least 14 times greater than the
input circuit time constant
τ. The sampling process on
the four input analog pins is quasi-independent so each
time constant should be considered by itself and, under
worst-case circumstances, the errors may add.
Whenusingtheinternaloscillator,theLTC2480’sfront-end
switched-capacitor network is clocked at 123kHz corre-
sponding to an 8.1s sampling period. Thus, for settling
errors of less than 1ppm, the driving source impedance
should be chosen such that
τ≤8.1s/14=580ns.Whenan
externaloscillatoroffrequencyfEOSCisused,thesampling
period is 2.5/fEOSC and, for a settling error of less than
1ppm,
τ ≤ 0.178/fEOSC.
Automatic Differential Input Current Cancellation
In applications where the sensor output impedance is
low (up to 10kΩ with no external bypass capacitor or up
to 500Ω with 0.001F bypass), complete settling of the
input occurs. In this case, no errors are introduced and
direct digitization of the sensor is possible.
For many applications, the sensor output impedance
combined with external bypass capacitors produces RC
time constants much greater than the 580ns required for
1ppmaccuracy.Forexample,a10kΩbridgedrivinga0.1F
bypasscapacitorhasatimeconstantanorderofmagnitude
greater than the required maximum. Historically, settling
issues were solved using buffers. These buffers led to
increased noise, reduced DC performance (Offset/Drift),
limited input/output swing (cannot digitize signals near
ground or VCC), added system cost and increased power.
The LTC2480 uses a proprietary switching algorithm that
forcestheaveragedifferentialinputcurrenttozeroindepen-
dent of external settling errors. This allows accurate direct
digitization of high impedance sensors without the need
of buffers. Additional errors resulting from mismatched
leakage currents must also be taken into account.
applicaTions inForMaTion
VREF+
VIN+
VCC
RSW (TYP)
10k
ILEAK
VCC
ILEAK
VCC
RSW (TYP)
10k
CEQ
12pF
(TYP)
RSW (TYP)
10k
ILEAK
IIN+
VIN–
IIN–
IREF+
IREF–
2480 F11
ILEAK
VCC
ILEAK
SWITCHING FREQUENCY
fSW = 123kHz INTERNAL OSCILLATOR
fSW = 0.4 fEOSC EXTERNAL OSCILLATOR
GND
RSW (TYP)
10k
I IN
V
R
I REF
V
R
V
R
V
D
R
V
R
V
R
where
AVG
IN CM
REF CM
EQ
AVG
REF
VREF
INCM
REFCM
EQ
IN
REF
EQ
REF
T
EQ
REF
REF CM
IN CM
EQ
IN
REF
EQ
–
(
)
(
)
(
)
(
)
.
.
.
–
.
–
0 5
1 5
0 5
1 5
0 5
2
:
.
V
IN
V
IN
R
M INTERNAL OSCILLATOR
Hz MODE
REFCM
IN
INCM
EQ
2
2 71
60
R
2.98M INTERNAL OSCILLATOR 50Hz AND 60Hz MODE
R
0.833 10
/ f
EXTERNAL OSCILLATOR
D IS THE DENSITY OF A DIGITAL TRANSITION AT THE MODULATOR OUTPUT
EQ
12
EOSC
T
WHERE REF– IS INTERNALLY TIED TO GND
Figure 11. LTC2480 Equivalent Analog Input Circuit
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