參數(shù)資料
型號: LTC2480CMS
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
封裝: PLASTIC, MSOP-10
文件頁數(shù): 20/40頁
文件大小: 601K
代理商: LTC2480CMS
27
LTC2480
2480fa
occurs. In this case, no errors are introduced and direct
digitization of the sensor is possible.
For many applications, the sensor output impedance com-
bined with external bypass capacitors produces RC time
constants much greater than the 580ns required for 1ppm
accuracy. For example, a 10k
bridge driving a 0.1F
bypass capacitor has a time constant an order of magni-
tude greater than the required maximum. Historically,
settling issues were solved using buffers. These buffers
led to increased noise, reduced DC performance (Offset/
Drift), limited input/output swing (cannot digitize signals
near ground or VCC), added system cost and increased
power. The LTC2480 uses a proprietary switching algo-
rithm that forces the average differential input current to
zero independent of external settling errors. This allows
accurate direct digitization of high impedance sensors
without the need of buffers. Additional errors resulting
from mismatched leakage currents must also be taken into
account.
The switching algorithm forces the average input current
on the positive input (IIN+) to be equal to the average input
current on the negative input (IIN–). Over the complete
conversion cycle, the average differential input current
(IIN+ – IIN–) is zero. While the differential input current is
zero, the common mode input current (IIN++ IIN–)/2 is
proportional to the difference between the common mode
input voltage (VINCM) and the common mode reference
voltage (VREFCM).
In applications where the input common mode voltage is
equal to the reference common mode voltage, as in the
case of a balance bridge type application, both the differ-
ential and common mode input current are zero. The
accuracy of the converter is unaffected by settling errors.
Mismatches in source impedances between IN+ and IN
also do not affect the accuracy.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between VINCM and VREFCM. For a reference
common mode of 2.5V and an input common mode of
1.5V, the common mode input current is approximately
0.74
A (in simultaneous 50Hz/60Hz rejection mode). This
common mode input current has no effect on the accuracy
if the external source impedances tied to IN+ and INare
matched. Mismatches in these source impedances lead to
a fixed offset error but do not affect the linearity or full-
scale reading. A 1% mismatch in 1k
source resistances
leads to a 15ppm shift (74
V) in offset voltage.
APPLICATIO S I FOR ATIO
WU
UU
Figure 11. LTC2480 Equivalent Analog Input Circuit
VREF
+
VIN
+
VCC
RSW (TYP)
10k
ILEAK
VCC
ILEAK
VCC
RSW (TYP)
10k
CEQ
12pF
(TYP)
RSW (TYP)
10k
ILEAK
IIN
+
VIN
IIN
IREF
+
IREF
2480 F11
ILEAK
VCC
ILEAK
SWITCHING FREQUENCY
fSW = 123kHz INTERNAL OSCILLATOR
fSW = 0.4 fEOSC EXTERNAL OSCILLATOR
GND
RSW (TYP)
10k
IIN
VV
R
I REF
VV
V
R
V
VR
VD
R
VV
V
R
V
VR
where
AVG
IN CM
REF CM
EQ
AVG
REF
VREF
INCM
REFCM
EQ
IN
REF
EQ
REF
T
EQ
REF
REF CM
IN CM
EQ
IN
REF
EQ
+
() = () =
() = +
+
()
()
.
.–
.
05
15
05
15
05
2
:
.
V
VIN
IN
V
IN
R
M
INTERNAL OSCILLATOR
Hz MODE
REFCM
IN
INCM
EQ
=
=
=
+
=
=
()
+
+
2
271
60
R
2.98M
INTERNAL OSCILLATOR 50Hz AND 60Hz MODE
R
0.833 10
/ f
EXTERNAL OSCILLATOR
D IS THE DENSITY OF A DIGITAL TRANSITION AT THE MODULATOR OUTPUT
EQ
12
EOSC
T
WHERE REFIS INTERNALLY TIED TO GND
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