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參數(shù)資料
| 型號(hào)： | LTC2286IUP#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 3/28頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC DUAL 10BIT 25MSPS 64QFN |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 25M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 180mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 64-QFN（9x9） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個(gè)單端，雙極; 2 個(gè)差分, 雙極 |
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LTC2288/LTC2287/LTC2286
11
228876fa
UU
U
PI FU CTIO S
AINA+ (Pin 1): Channel A Positive Differential Analog
Input.
AINA– (Pin 2): Channel A Negative Differential Analog
Input.
REFHA (Pins 3, 4): Channel A High Reference. Short
together and bypass to Pins 5, 6 with a 0.1
F ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 5, 6 with an additional 2.2
F ceramic chip capacitor
and to ground with a 1
F ceramic chip capacitor.
REFLA (Pins 5, 6): Channel A Low Reference. Short
together and bypass to Pins 3, 4 with a 0.1
F ceramic chip
capacitor as close to the pin as possible. Also bypass to
Pins 3, 4 with an additional 2.2
F ceramic chip capacitor
and to ground with a 1
F ceramic chip capacitor.
VDD (Pins 7, 10, 18, 63): Analog 3V Supply. Bypass to
GND with 0.1
F ceramic chip capacitors.
CLKA (Pin 8): Channel A Clock Input. The input sample
starts on the positive edge.
CLKB (Pin 9): Channel B Clock Input. The input sample
starts on the positive edge.
REFLB (Pins 11, 12): Channel B Low Reference. Short
together and bypass to Pins 13, 14 with a 0.1
F ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 13, 14 with an additional 2.2
F ceramic chip ca-
pacitor and to ground with a 1
F ceramic chip capacitor.
REFHB (Pins 13, 14): Channel B High Reference. Short
together and bypass to Pins 11, 12 with a 0.1
F ceramic
chip capacitor as close to the pin as possible. Also bypass
to Pins 11, 12 with an additional 2.2
F ceramic chip ca-
pacitor and to ground with a 1
F ceramic chip capacitor.
AINB– (Pin 15): Channel B Negative Differential Analog
Input.
AINB+ (Pin 16): Channel B Positive Differential Analog
Input.
GND (Pins 17, 64): ADC Power Ground.
SENSEB (Pin 19): Channel B Reference Programming Pin.
Connecting SENSEB to VCMB selects the internal reference
and a
±0.5V input range. VDD selects the internal reference
and a
±1V input range. An external reference greater than
0.5V and less than 1V applied to SENSEB selects an input
range of
±VSENSEB. ±1V is the largest valid input range.
VCMB (Pin 20): Channel B 1.5V Output and Input Common
Mode Bias. Bypass to ground with 2.2
F ceramic chip
capacitor. Do not connect to VCMA.
LTC2286: IOVDD vs Sample Rate,
5MHz Sine Wave Input, –1dB,
OVDD = 1.8V
LTC2286: IVDD vs Sample Rate,
5MHz Sine Wave Input, –1dB
LTC2286: SFDR vs Input Level,
fIN = 5MHz, 2V Range, 25Msps
TYPICAL PERFOR A CE CHARACTERISTICS
UW
SAMPLE RATE (Msps)
I VDD
(mA)
228876 G45
70
60
50
40
30
0
10
20
515
25
30
35
2V RANGE
1V RANGE
0
10
20
515
25
30
35
SAMPLE RATE (Msps)
I OVDD
(mA)
228876 G46
6
4
2
0
INPUT LEVEL (dBFS)
–60
0
SFDR
(dBc
AND
dBFS)
20
40
60
80
120
–50
–40
–30
dBFS
dBc
–20
228876 G44
–10
0
100
10
30
50
70
110
90
80dBc SFDR
REFERENCE LINE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2286UP | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 10-Bit, 65/40/25Msps Low Noise 3V ADCs |
| LTC2287 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 10-Bit, 65/40/25Msps Low Noise 3V ADCs |
| LTC2287CUP | 制造商:Linear Technology 功能描述:ADC Dual Pipelined 40Msps 10-bit Parallel 64-Pin QFN EP |
| LTC2287CUP#PBF | 功能描述:IC ADC DUAL 10BIT 40MSPS 64QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| LTC2287CUP#TR | 制造商:Linear Technology 功能描述:ADC Dual Pipelined 40Msps 10-bit Parallel 64-Pin QFN EP T/R |
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