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參數(shù)資料
| 型號： | LTC2272CUJ |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| 封裝： | 6 X 6 MM, PLASTIC, QFN-40 |
| 文件頁數(shù)： | 41/44頁 |
| 文件大小： | 767K |
| 代理商： | LTC2272CUJ |
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LTC2273/LTC2272
6
22732fa
TIMING CHARACTERISTICS The l denotes the specications which apply over the full operating temperature
range, otherwise specications are at TA = 25°C. (Note 4)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND (unless otherwise
noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: VDD = 3.3V, fSAMPLE = 105MHz differential ENC+/ENC– = 2VP-P sine
wave with 1.6V common mode, input range = 2.25VP-P with differential
drive (PGA = 0), unless otherwise specied.
Note 5: Integral nonlinearity is dened as the deviation of a code from
a “best t straight line” to the transfer curve. The deviation is measured
from the center of the quantization band.
Note 6: Offset error is the offset voltage measured from –1/2LSB when the
output code ickers between 0000 0000 0000 0000 and 1111 1111 1111
1111 in 2’s complement output mode.
Note 7: Guaranteed by design, not subject to test.
Note 8: VDD = 3.3V, fSAMPLE = 80Msps (LTC2273) or 65Msps (LTC2272)
input range = 2.25VP-P with differential drive.
Note 9: Recommended operating conditions.
Note 10: The dynamic current of the switched capacitors analog inputs
can be large compared to the leakage current and will vary with the sample
rate.
Note 11: Leakage current will have higher transient current at power up.
Keep drive resistance at or below 1k.
The
l denotes the specications which apply over the full operating temperature
range, otherwise specications are at TA = 25°C. AIN = –1dBFS. (Note 4)
POWER REQUIREMENTS
SYMBOL PARAMETER
CONDITIONS
LTC2273
LTC2272
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
VDD
Analog Supply Voltage
l 3.135
3.3
3.465
3.135
3.3
3.465
V
PSHDN
Shutdown Power
SHDN = VDD
55
mW
OVDD
Output Supply Voltage
CMLOUT Directly-Coupled, 50Ω to OVDD (Note 7)
CMLOUT Directly-Coupled, 100Ω Diff. (Note 7)
CMLOUT AC-Coupled (Note 7)
l
1.2
1.4
VDD
1.2
1.4
VDD
V
IVDD
Analog Supply Current
DC Input
l
233
370
300
340
mA
IOVDD
Output Supply Current
CMLOUT Directly-Coupled, 50Ω to OVDD
CMLOUT Directly-Coupled, 100Ω Diff.
CMLOUT AC-Coupled
l
8
16
8
16
mA
PDIS
Power Dissipation
DC Input
l
1100
1221
990
1122
mW
SYMBOL PARAMETER
CONDITIONS
LTC2273
LTC2272
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
fS
Sampling Frequency
(Note 9)
l
20
80
20
65
MHz
tCONV
Conversion Period
1/fS
s
tL
ENC Clock Low Time
(Note 7)
l
4.06
6.25
25
5.03
7.69
25
ns
tH
ENC Clock High Time
(Note 7)
l
4.06
6.25
25
5.03
7.69
25
ns
tAP
Sample-and-Hold Aperture Delay
0.7
ns
tBIT, UI
Period of a Serial Bit
tCONV/20
s
tJIT
Total Jitter of CMLOUT± (P-P)
BER = 1E–12 (Note 7)
l
0.35
UI
tR, tF
Differential Rise and Fall Time of
CMLOUT± (20% to 80%)
RTERM = 50Ω, CL = 2pF
(Note 7)
l
50
110
50
110
ps
tSU
SYNC to ENC Clock Setup Time
(Note 7)
l
22
ns
tHD
ENC Clock to SYNC Hold Time
(Note 7)
l
2.5
ns
tCS
ENC Clock to SYNC Delay
(Note 7)
l
tHD
tCONV – tSU
tHD
tCONV – tSU
ns
LATP
Pipeline Latency
9
Cycles
LATSC
Latency from SYNC Active to COMMA Out
3
Cycles
LATSD
Latency from SYNC Release to DATA Out
2
Cycles
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|---|---|
| LTC2273CUJ | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2272IUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2273IUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2273IUJ | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
| LTC2274CUJ#TR | 1-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQCC40 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2272CUJ#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 65Msps 16-bit Serial 40-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 65MSPS 40-QFN 制造商:Linear Technology 功能描述:A/D Converter IC 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 65MSPS, QFN-40; Resolution (Bits):16bit; Sampling Rate:65MSPS; Supply Voltage Type:Single; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Supply Current:300mA; Digital IC Case Style:QFN; No. of Pins:40 ;RoHS Compliant: Yes |
| LTC2272CUJ#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 65Msps 16-bit Serial 40-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT 65MSPS 40-QFN |
| LTC2272CUJ-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
| LTC2272CUJ-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
| LTC2272CUJ-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 80Msps/65Msps Serial Output ADC |
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