參數(shù)資料
型號(hào): LTC2254IUH#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 14-Bit, 105Msps Low Power 3V ADCs; Package: QFN; No of Pins: 32; Temperature Range: -40°C to +85°C
中文描述: 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC32
封裝: 5 X 5 MM, PLASTIC, MO-220-WHHD, QFN-32
文件頁(yè)數(shù): 20/24頁(yè)
文件大小: 620K
代理商: LTC2254IUH#TR
LTC2255/LTC2254
5
22554fa
TI I G CHARACTERISTICS
U
W
The
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 4)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: VDD = 3V, fSAMPLE = 125MHz (LTC2255) or 105MHz (LTC2254),
input range = 2VP-P with differential drive, clock duty cycle stabilizer on,
unless otherwise noted.
Note 5: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6: Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 0000 and
11 1111 1111 1111.
Note 7: Guaranteed by design, not subject to test.
Note 8: VDD = 3V, fSAMPLE = 125MHz (LTC2255) or 105MHz (LTC2254),
input range = 1VP-P with differential drive.
Note 9: Recommended operating conditions.
LTC2255
LTC2254
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
fs
Sampling Frequency
(Note 9)
1
125
1
105
MHz
tL
CLK Low Time
Duty Cycle Stabilizer Off
3.8
4
500
4.5
4.76
500
ns
Duty Cycle Stabilizer On
3
4
500
3
4.76
500
ns
(Note 7)
tH
CLK High Time
Duty Cycle Stabilizer Off
3.8
4
500
4.5
4.76
500
ns
Duty Cycle Stabilizer On
3
4
500
3
4.76
500
ns
(Note 7)
tAP
Sample-and-Hold
0
ns
Aperture Delay
tD
CLK to DATA delay
CL = 5pF (Note 7)
1.4
2.7
5.4
1.4
2.7
5.4
ns
Data Access Time
CL = 5pF (Note 7)
4.3
10
4.3
10
ns
After OE
BUS Relinquish Time
(Note 7)
3.3
8.5
3.3
8.5
ns
Pipeline Latency
5
Cycles
相關(guān)PDF資料
PDF描述
LTC2255CUH#TR 14-Bit, 125Msps Low Power 3V ADCs; Package: QFN; No of Pins: 32; Temperature Range: 0°C to +70°C
LTC2280CUP Dual 10-Bit, 105Msps Low Noise 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: 0°C to +70°C
LTC2280CUP#TR Dual 10-Bit, 105Msps Low Noise 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: 0°C to +70°C
LTC2280IUP Dual 10-Bit, 105Msps Low Noise 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: -40°C to +85°C
LTC2280IUP#TR Dual 10-Bit, 105Msps Low Noise 3V ADC; Package: QFN; No of Pins: 64; Temperature Range: -40°C to +85°C
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC2255 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 125/105Msps Low Power 3V ADCs
LTC2255CUH 制造商:Linear Technology 功能描述:ADC Single Pipelined 125Msps 14-bit Parallel 32-Pin QFN EP
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LTC2255IUH 制造商:Linear Technology 功能描述:ADC Single Pipelined 125Msps 14-bit Parallel 32-Pin QFN EP